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This adds the pinctrl configuration for the CS47L92 codec to the madera pinctrl driver. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20190722091015.20884-3-ckeepax@opensource.cirrus.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
41 lines
1.4 KiB
C
41 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Pinctrl for Cirrus Logic CS47L92
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*
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* Copyright (C) 2018-2019 Cirrus Logic, Inc. and
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* Cirrus Logic International Semiconductor Ltd.
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*/
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#include <linux/err.h>
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#include <linux/mfd/madera/core.h>
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#include "pinctrl-madera.h"
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/*
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* The alt func groups are the most commonly used functions we place these at
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* the lower function indexes for convenience, and the less commonly used gpio
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* functions at higher indexes.
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*
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* To stay consistent with the datasheet the function names are the same as
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* the group names for that function's pins
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*
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* Note - all 1 less than in datasheet because these are zero-indexed
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*/
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static const unsigned int cs47l92_spk1_pins[] = { 2, 3 };
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static const unsigned int cs47l92_aif1_pins[] = { 4, 5, 6, 7 };
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static const unsigned int cs47l92_aif2_pins[] = { 8, 9, 10, 11 };
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static const unsigned int cs47l92_aif3_pins[] = { 12, 13, 14, 15 };
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static const struct madera_pin_groups cs47l92_pin_groups[] = {
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{ "aif1", cs47l92_aif1_pins, ARRAY_SIZE(cs47l92_aif1_pins) },
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{ "aif2", cs47l92_aif2_pins, ARRAY_SIZE(cs47l92_aif2_pins) },
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{ "aif3", cs47l92_aif3_pins, ARRAY_SIZE(cs47l92_aif3_pins) },
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{ "pdmspk1", cs47l92_spk1_pins, ARRAY_SIZE(cs47l92_spk1_pins) },
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};
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const struct madera_pin_chip cs47l92_pin_chip = {
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.n_pins = CS47L92_NUM_GPIOS,
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.pin_groups = cs47l92_pin_groups,
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.n_pin_groups = ARRAY_SIZE(cs47l92_pin_groups),
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};
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