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038b0a6d8d
kbuild explicitly includes this at build time. Signed-off-by: Dave Jones <davej@redhat.com>
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/*
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* MPC85xx ADS board definitions
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*
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* Copyright 2004 Freescale Semiconductor Inc.
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*
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* 2006 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __MACH_MPC85XXADS_H
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#define __MACH_MPC85XXADS_H
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#include <linux/initrd.h>
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#include <sysdev/fsl_soc.h>
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#define BCSR_ADDR ((uint)0xf8000000)
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#define BCSR_SIZE ((uint)(32 * 1024))
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#ifdef CONFIG_CPM2
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#define MPC85xx_CPM_OFFSET (0x80000)
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#define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET)
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#define CPM_IRQ_OFFSET 60
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#define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
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#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
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#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
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/* FCC1 Clock Source Configuration. These can be
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* redefined in the board specific file.
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* Can only choose from CLK9-12 */
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#define F1_RXCLK 12
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#define F1_TXCLK 11
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/* FCC2 Clock Source Configuration. These can be
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* redefined in the board specific file.
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* Can only choose from CLK13-16 */
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#define F2_RXCLK 13
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#define F2_TXCLK 14
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/* FCC3 Clock Source Configuration. These can be
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* redefined in the board specific file.
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* Can only choose from CLK13-16 */
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#define F3_RXCLK 15
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#define F3_TXCLK 16
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#endif /* CONFIG_CPM2 */
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#endif /* __MACH_MPC85XXADS_H */
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