linux/arch
Paolo Bonzini 4e06bb02ad KVM: x86: check PIR even for vCPUs with disabled APICv
commit 37c4dbf337 upstream.

The IRTE for an assigned device can trigger a POSTED_INTR_VECTOR even
if APICv is disabled on the vCPU that receives it.  In that case, the
interrupt will just cause a vmexit and leave the ON bit set together
with the PIR bit corresponding to the interrupt.

Right now, the interrupt would not be delivered until APICv is re-enabled.
However, fixing this is just a matter of always doing the PIR->IRR
synchronization, even if the vCPU has temporarily disabled APICv.

This is not a problem for performance, or if anything it is an
improvement.  First, in the common case where vcpu->arch.apicv_active is
true, one fewer check has to be performed.  Second, static_call_cond will
elide the function call if APICv is not present or disabled.  Finally,
in the case for AMD hardware we can remove the sync_pir_to_irr callback:
it is only needed for apic_has_interrupt_for_ppr, and that function
already has a fallback for !APICv.

Cc: stable@vger.kernel.org
Co-developed-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: David Matlack <dmatlack@google.com>
Message-Id: <20211123004311.2954158-4-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-12-08 09:04:44 +01:00
..
alpha alpha: enable GENERIC_PCI_IOMAP unconditionally 2021-09-19 10:37:00 -07:00
arc signal: Replace force_sigsegv(SIGSEGV) with force_fatal_sig(SIGSEGV) 2021-11-25 09:49:06 +01:00
arm ARM: socfpga: Fix crash with CONFIG_FORTIRY_SOURCE 2021-12-01 09:04:47 +01:00
arm64 KVM: arm64: Avoid setting the upper 32 bits of TCR_EL2 and CPTR_EL2 to 1 2021-12-08 09:04:44 +01:00
csky csky: Make HAVE_TCM depend on !COMPILE_TEST 2021-10-16 07:20:12 +08:00
h8300 Merge branch 'akpm' (patches from Andrew) 2021-09-08 12:55:35 -07:00
hexagon hexagon: clean up timer-regs.h 2021-11-25 09:48:42 +01:00
ia64 ia64: don't do IA64_CMPXCHG_DEBUG without CONFIG_PRINTK 2021-11-18 19:16:13 +01:00
m68k signal: Replace force_fatal_sig with force_exit_sig when in doubt 2021-11-25 09:49:07 +01:00
microblaze Microblaze patches for 5.15-rc1 2021-09-08 16:02:13 -07:00
mips MIPS: use 3-level pgtable for 64KB page size on MIPS_VA_BITS_48 2021-12-01 09:04:53 +01:00
nds32 ftrace/nds32: Update the proto for ftrace_trace_function to match ftrace_stub 2021-10-27 13:00:17 -04:00
nios2 nios2: Make NIOS2_DTB_SOURCE_BOOL depend on !COMPILE_TEST 2021-10-27 09:29:07 -05:00
openrisc openrisc: fix SMP tlb flush NULL pointer dereference 2021-11-18 19:17:06 +01:00
parisc Revert "parisc: Fix backtrace to always include init funtion names" 2021-12-01 09:04:41 +01:00
powerpc powerpc/pseries/ddw: Do not try direct mapping with persistent memory and one window 2021-12-08 09:04:37 +01:00
riscv riscv: dts: microchip: drop duplicated MMC/SDHC node 2021-12-01 09:04:55 +01:00
s390 s390/pci: move pseudo-MMIO to prevent MIO overlap 2021-12-08 09:04:42 +01:00
sh sh: define __BIG_ENDIAN for math-emu 2021-11-25 09:48:31 +01:00
sparc signal: Replace force_fatal_sig with force_exit_sig when in doubt 2021-11-25 09:49:07 +01:00
um signal: Replace force_sigsegv(SIGSEGV) with force_fatal_sig(SIGSEGV) 2021-11-25 09:49:06 +01:00
x86 KVM: x86: check PIR even for vCPUs with disabled APICv 2021-12-08 09:04:44 +01:00
xtensa xtensa: xtfpga: Try software restart before simulating CPU reset 2021-10-05 12:19:05 -07:00
.gitignore
Kconfig arch/cc: Introduce a function to check for confidential computing features 2021-11-18 19:17:21 +01:00