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The General Register Files are an area of registers containing a lot of single-bit settings for numerous components as well full components like usbphy control. Therefore all used components are accessed via the syscon provided by the grf nodes or from the sub-devices created through the simple-mfd created from the grf node. Some settings are not used by anything but will need to be set up according to expectations on the kernel side. Best example is the force_jtag setting, which defaults to on and results in the soc switching the pin-outputs between jtag and sdmmc automatically depending on the card-detect status. This conflicts heavily with how the dw_mmc driver expects to do its work and also with the clock-controller, which has most likely deactivated the jtag clock due to it being unused. So far the handling of this setting was living in the mach-rockchip code for the arm32-based rk3288 but that of course doesn't work for arm64 socs and would also look ugly for further arm32 socs. Also always disabling this setting is quite specific to linux and its subsystems, other operating systems might prefer other settings, so that the bootloader cannot really set a sane default for all. So introduce a top-level driver for the grf that handles these settings that need to be a certain way but nobody cares about. Other needed settings might surface in the future and can then be added here, but only as a last option. Ideally general GRF settings should be handled in the driver needing them. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org>
29 lines
850 B
Plaintext
29 lines
850 B
Plaintext
if ARCH_ROCKCHIP || COMPILE_TEST
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#
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# Rockchip Soc drivers
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#
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config ROCKCHIP_GRF
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bool
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default y
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help
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The General Register Files are a central component providing
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special additional settings registers for a lot of soc-components.
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In a lot of cases there also need to be default settings initialized
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to make some of them conform to expectations of the kernel.
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config ROCKCHIP_PM_DOMAINS
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bool "Rockchip generic power domain"
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depends on PM
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select PM_GENERIC_DOMAINS
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help
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Say y here to enable power domain support.
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In order to meet high performance and low power requirements, a power
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management unit is designed or saving power when RK3288 in low power
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mode. The RK3288 PMU is dedicated for managing the power of the whole chip.
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If unsure, say N.
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endif
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