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8011657b9e
This adds support for the Broadcom timer, used in the following SoCs: BCM11130, BCM11140, BCM11351, BCM28145, BCM28155 Updates from V6: - Split DT portion into a separate patch Updates from V5: - Rebase to latest arm-soc/for-next Updates from V4: - Switch code to use CLOCKSOURCE_OF_DECLARE Updates from V3: - Migrate to 3.9 timer framework updates Updates from V2: - prepend static fns + fields with kona_ Updates from V1: - Rename bcm_timer.c to bcm_kona_timer.c - Pull .h into bcm_kona_timer.c - Make timers static - Clean up comment block - Switched to using clockevents_config_and_register - Added an error to the get_timer loop if it repeats too much - Added to Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt - Added missing readl to timer_disable_and_clear Note: bcm,kona-timer was kept as the 'compatible' field to make it specific enough for when there are multiple bcm timers (bcm,timer is too generic). Signed-off-by: Christian Daudt <csd@broadcom.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: John Stultz <john.stultz@linaro.org>
212 lines
5.2 KiB
C
212 lines
5.2 KiB
C
/*
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* Copyright (C) 2012 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/jiffies.h>
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#include <linux/clockchips.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <asm/mach/time.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#define KONA_GPTIMER_STCS_OFFSET 0x00000000
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#define KONA_GPTIMER_STCLO_OFFSET 0x00000004
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#define KONA_GPTIMER_STCHI_OFFSET 0x00000008
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#define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
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#define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
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#define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
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struct kona_bcm_timers {
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int tmr_irq;
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void __iomem *tmr_regs;
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};
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static struct kona_bcm_timers timers;
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static u32 arch_timer_rate;
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/*
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* We use the peripheral timers for system tick, the cpu global timer for
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* profile tick
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*/
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static void kona_timer_disable_and_clear(void __iomem *base)
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{
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uint32_t reg;
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/*
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* clear and disable interrupts
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* We are using compare/match register 0 for our system interrupts
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*/
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reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
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/* Clear compare (0) interrupt */
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reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
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/* disable compare */
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reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
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writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
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}
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static void
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kona_timer_get_counter(void *timer_base, uint32_t *msw, uint32_t *lsw)
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{
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void __iomem *base = IOMEM(timer_base);
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int loop_limit = 4;
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/*
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* Read 64-bit free running counter
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* 1. Read hi-word
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* 2. Read low-word
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* 3. Read hi-word again
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* 4.1
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* if new hi-word is not equal to previously read hi-word, then
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* start from #1
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* 4.2
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* if new hi-word is equal to previously read hi-word then stop.
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*/
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while (--loop_limit) {
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*msw = readl(base + KONA_GPTIMER_STCHI_OFFSET);
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*lsw = readl(base + KONA_GPTIMER_STCLO_OFFSET);
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if (*msw == readl(base + KONA_GPTIMER_STCHI_OFFSET))
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break;
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}
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if (!loop_limit) {
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pr_err("bcm_kona_timer: getting counter failed.\n");
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pr_err(" Timer will be impacted\n");
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}
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return;
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}
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static const struct of_device_id bcm_timer_ids[] __initconst = {
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{.compatible = "bcm,kona-timer"},
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{},
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};
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static void __init kona_timers_init(void)
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{
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struct device_node *node;
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u32 freq;
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node = of_find_matching_node(NULL, bcm_timer_ids);
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if (!node)
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panic("No timer");
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if (!of_property_read_u32(node, "clock-frequency", &freq))
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arch_timer_rate = freq;
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else
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panic("clock-frequency not set in the .dts file");
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/* Setup IRQ numbers */
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timers.tmr_irq = irq_of_parse_and_map(node, 0);
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/* Setup IO addresses */
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timers.tmr_regs = of_iomap(node, 0);
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kona_timer_disable_and_clear(timers.tmr_regs);
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}
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static int kona_timer_set_next_event(unsigned long clc,
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struct clock_event_device *unused)
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{
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/*
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* timer (0) is disabled by the timer interrupt already
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* so, here we reload the next event value and re-enable
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* the timer.
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*
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* This way, we are potentially losing the time between
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* timer-interrupt->set_next_event. CPU local timers, when
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* they come in should get rid of skew.
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*/
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uint32_t lsw, msw;
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uint32_t reg;
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kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
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/* Load the "next" event tick value */
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writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
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/* Enable compare */
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reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
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reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
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writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
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return 0;
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}
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static void kona_timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *unused)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_ONESHOT:
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/* by default mode is one shot don't do any thing */
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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default:
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kona_timer_disable_and_clear(timers.tmr_regs);
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}
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}
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static struct clock_event_device kona_clockevent_timer = {
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.name = "timer 1",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = kona_timer_set_next_event,
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.set_mode = kona_timer_set_mode
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};
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static void __init kona_timer_clockevents_init(void)
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{
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kona_clockevent_timer.cpumask = cpumask_of(0);
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clockevents_config_and_register(&kona_clockevent_timer,
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arch_timer_rate, 6, 0xffffffff);
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}
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static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &kona_clockevent_timer;
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kona_timer_disable_and_clear(timers.tmr_regs);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction kona_timer_irq = {
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.name = "Kona Timer Tick",
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.flags = IRQF_TIMER,
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.handler = kona_timer_interrupt,
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};
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static void __init kona_timer_init(void)
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{
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kona_timers_init();
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kona_timer_clockevents_init();
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setup_irq(timers.tmr_irq, &kona_timer_irq);
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kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
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}
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CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer",
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kona_timer_init);
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