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Add Freescale i.MX8qm LVDS PHY support. The PHY IP is from Mixel, Inc. Signed-off-by: Liu Ying <victor.liu@nxp.com> Link: https://lore.kernel.org/r/20220706034810.2352641-4-victor.liu@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
50 lines
1.3 KiB
Plaintext
50 lines
1.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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if (ARCH_MXC && ARM64) || COMPILE_TEST
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config PHY_FSL_IMX8MQ_USB
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tristate "Freescale i.MX8M USB3 PHY"
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depends on OF && HAS_IOMEM
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select GENERIC_PHY
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default ARCH_MXC && ARM64
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config PHY_MIXEL_LVDS_PHY
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tristate "Mixel LVDS PHY support"
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depends on OF
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select GENERIC_PHY
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select REGMAP_MMIO
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help
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Enable this to add support for the Mixel LVDS PHY as found
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on NXP's i.MX8qm SoC.
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config PHY_MIXEL_MIPI_DPHY
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tristate "Mixel MIPI DSI PHY support"
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depends on OF && HAS_IOMEM
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select GENERIC_PHY
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select GENERIC_PHY_MIPI_DPHY
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select REGMAP_MMIO
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help
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Enable this to add support for the Mixel DSI PHY as found
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on NXP's i.MX8 family of SOCs.
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config PHY_FSL_IMX8M_PCIE
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tristate "Freescale i.MX8M PCIE PHY"
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depends on OF && HAS_IOMEM
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select GENERIC_PHY
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help
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Enable this to add support for the PCIE PHY as found on
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i.MX8M family of SOCs.
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endif
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config PHY_FSL_LYNX_28G
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tristate "Freescale Layerscape Lynx 28G SerDes PHY support"
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depends on OF
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depends on ARCH_LAYERSCAPE || COMPILE_TEST
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select GENERIC_PHY
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help
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Enable this to add support for the Lynx SerDes 28G PHY as
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found on NXP's Layerscape platforms such as LX2160A.
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Used to change the protocol running on SerDes lanes at runtime.
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Only useful for a restricted set of Ethernet protocols.
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