linux/arch/arm/boot/dts/ste-href.dtsi
Linus Walleij f6a76d4256 ARM: dts: ux500: Break out DB8500 DTSI
The DB8500 exists in an enhanced variant named DB8520
for some machines. To clearly distinguish between the
different machines, create an explicit db8500.dtsi
and move the operating points (only known difference so
far) to that file, so we can add an explicit db8520.dtsi
after this.

Cc: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191126124738.77690-1-linus.walleij@linaro.org
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:02 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2012 ST-Ericsson AB
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include "ste-href-family-pinctrl.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};
soc {
uart@80120000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&u0_a_1_default>;
pinctrl-1 = <&u0_a_1_sleep>;
status = "okay";
};
/* This UART is unused and thus left disabled */
uart@80121000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&u1rxtx_a_1_default>;
pinctrl-1 = <&u1rxtx_a_1_sleep>;
};
uart@80007000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&u2rxtx_c_1_default>;
pinctrl-1 = <&u2rxtx_c_1_sleep>;
status = "okay";
};
i2c@80004000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c0_a_1_default>;
pinctrl-1 = <&i2c0_a_1_sleep>;
status = "okay";
};
i2c@80122000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c1_b_2_default>;
pinctrl-1 = <&i2c1_b_2_sleep>;
status = "okay";
};
i2c@80128000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c2_b_2_default>;
pinctrl-1 = <&i2c2_b_2_sleep>;
status = "okay";
lp5521@33 {
compatible = "national,lp5521";
reg = <0x33>;
label = "lp5521_pri";
clock-mode = /bits/ 8 <2>;
chan0 {
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
linux,default-trigger = "heartbeat";
};
chan1 {
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan2 {
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
};
lp5521@34 {
compatible = "national,lp5521";
reg = <0x34>;
label = "lp5521_sec";
clock-mode = /bits/ 8 <2>;
chan0 {
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan1 {
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
chan2 {
led-cur = /bits/ 8 <0x2f>;
max-cur = /bits/ 8 <0x5f>;
};
};
bh1780@29 {
compatible = "rohm,bh1780gli";
reg = <0x29>;
};
};
i2c@80110000 {
pinctrl-names = "default","sleep";
pinctrl-0 = <&i2c3_c_2_default>;
pinctrl-1 = <&i2c3_c_2_sleep>;
status = "okay";
};
/* ST6G3244ME level translator for 1.8/2.9 V */
vmmci: regulator-gpio {
compatible = "regulator-gpio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-name = "mmci-reg";
regulator-type = "voltage";
startup-delay-us = <100>;
states = <1800000 0x1
2900000 0x0>;
};
// External Micro SD slot
sdi0_per1@80126000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
full-pwr-cycle;
st,sig-dir-dat0;
st,sig-dir-dat2;
st,sig-dir-cmd;
st,sig-pin-fbclk;
vmmc-supply = <&ab8500_ldo_aux3_reg>;
vqmmc-supply = <&vmmci>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>;
pinctrl-1 = <&mc0_a_1_sleep>;
status = "okay";
};
// WLAN SDIO channel
sdi1_per2@80118000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <4>;
non-removable;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mc1_a_1_default>;
pinctrl-1 = <&mc1_a_1_sleep>;
status = "okay";
};
// PoP:ed eMMC
sdi2_per3@80005000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <8>;
cap-mmc-highspeed;
non-removable;
vmmc-supply = <&db8500_vsmps2_reg>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mc2_a_1_default>;
pinctrl-1 = <&mc2_a_1_sleep>;
status = "okay";
};
// On-board eMMC
sdi4_per2@80114000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <8>;
cap-mmc-highspeed;
non-removable;
vmmc-supply = <&ab8500_ldo_aux2_reg>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mc4_a_1_default>;
pinctrl-1 = <&mc4_a_1_sleep>;
status = "okay";
};
msp0: msp@80123000 {
pinctrl-names = "default";
pinctrl-0 = <&msp0txrxtfstck_a_1_default>;
status = "okay";
};
msp1: msp@80124000 {
pinctrl-names = "default";
pinctrl-0 = <&msp1txrx_a_1_default>;
status = "okay";
};
msp2: msp@80117000 {
pinctrl-names = "default";
pinctrl-0 = <&msp2_a_1_default>;
};
msp3: msp@80125000 {
status = "okay";
};
prcmu@80157000 {
ab8500 {
ab8500-gpio {
};
ab8500_usb {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&usb_a_1_default>;
pinctrl-1 = <&usb_a_1_sleep>;
};
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";
};
ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
regulator-name = "V-eMMC1";
};
ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
regulator-name = "V-MMC-SD";
};
ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
regulator-name = "V-INTCORE";
};
ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
regulator-name = "V-TVOUT";
};
ab8500_ldo_audio_reg: ab8500_ldo_audio {
regulator-name = "V-AUD";
};
ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
regulator-name = "V-AMIC1";
};
ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
regulator-name = "V-AMIC2";
};
ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
regulator-name = "V-DMIC";
};
ab8500_ldo_ana_reg: ab8500_ldo_ana {
regulator-name = "V-CSI/DSI";
};
};
};
};
pinctrl {
sdi0 {
sdi0_default_mode: sdi0_default {
/* Some boards set additional settings here */
};
};
};
mcde@a0350000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcd_default_mode>;
pinctrl-1 = <&lcd_sleep_mode>;
};
};
};