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21c1f9021f
I/O translation tables on s390 use 8 byte page table entries and tables which are allocated lazily but only freed when the entire I/O translation table is torn down. Also each IOVA can at any time only translate to one physical address Furthermore I/O table accesses by the IOMMU hardware are cache coherent. With a bit of care we can thus use atomic updates to manipulate the translation table without having to use a global lock at all. This is done analogous to the existing I/O translation table handling code used on Intel and AMD x86 systems. Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Link: https://lore.kernel.org/r/20221109142903.4080275-6-schnelle@linux.ibm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
328 lines
8.3 KiB
C
328 lines
8.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_S390_PCI_H
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#define __ASM_S390_PCI_H
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#include <linux/pci.h>
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#include <linux/mutex.h>
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#include <linux/iommu.h>
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#include <linux/pci_hotplug.h>
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#include <asm/pci_clp.h>
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#include <asm/pci_debug.h>
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#include <asm/pci_insn.h>
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#include <asm/sclp.h>
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x10000000
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#define pcibios_assign_all_busses() (0)
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void __iomem *pci_iomap(struct pci_dev *, int, unsigned long);
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void pci_iounmap(struct pci_dev *, void __iomem *);
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int pci_domain_nr(struct pci_bus *);
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int pci_proc_domain(struct pci_bus *);
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#define ZPCI_BUS_NR 0 /* default bus number */
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#define ZPCI_NR_DMA_SPACES 1
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#define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
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#define ZPCI_DOMAIN_BITMAP_SIZE (1 << 16)
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#ifdef PCI
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#if (ZPCI_NR_DEVICES > ZPCI_DOMAIN_BITMAP_SIZE)
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# error ZPCI_NR_DEVICES can not be bigger than ZPCI_DOMAIN_BITMAP_SIZE
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#endif
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#endif /* PCI */
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/* PCI Function Controls */
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#define ZPCI_FC_FN_ENABLED 0x80
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#define ZPCI_FC_ERROR 0x40
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#define ZPCI_FC_BLOCKED 0x20
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#define ZPCI_FC_DMA_ENABLED 0x10
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#define ZPCI_FMB_DMA_COUNTER_VALID (1 << 23)
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struct zpci_fmb_fmt0 {
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u64 dma_rbytes;
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u64 dma_wbytes;
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};
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struct zpci_fmb_fmt1 {
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u64 rx_bytes;
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u64 rx_packets;
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u64 tx_bytes;
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u64 tx_packets;
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};
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struct zpci_fmb_fmt2 {
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u64 consumed_work_units;
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u64 max_work_units;
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};
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struct zpci_fmb_fmt3 {
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u64 tx_bytes;
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};
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struct zpci_fmb {
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u32 format : 8;
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u32 fmt_ind : 24;
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u32 samples;
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u64 last_update;
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/* common counters */
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u64 ld_ops;
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u64 st_ops;
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u64 stb_ops;
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u64 rpcit_ops;
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/* format specific counters */
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union {
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struct zpci_fmb_fmt0 fmt0;
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struct zpci_fmb_fmt1 fmt1;
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struct zpci_fmb_fmt2 fmt2;
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struct zpci_fmb_fmt3 fmt3;
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};
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} __packed __aligned(128);
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enum zpci_state {
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ZPCI_FN_STATE_STANDBY = 0,
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ZPCI_FN_STATE_CONFIGURED = 1,
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ZPCI_FN_STATE_RESERVED = 2,
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};
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struct zpci_bar_struct {
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struct resource *res; /* bus resource */
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void __iomem *mio_wb;
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void __iomem *mio_wt;
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u32 val; /* bar start & 3 flag bits */
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u16 map_idx; /* index into bar mapping array */
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u8 size; /* order 2 exponent */
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};
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struct s390_domain;
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struct kvm_zdev;
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#define ZPCI_FUNCTIONS_PER_BUS 256
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struct zpci_bus {
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struct kref kref;
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struct pci_bus *bus;
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struct zpci_dev *function[ZPCI_FUNCTIONS_PER_BUS];
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struct list_head resources;
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struct list_head bus_next;
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struct resource bus_resource;
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int pchid;
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int domain_nr;
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bool multifunction;
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enum pci_bus_speed max_bus_speed;
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};
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/* Private data per function */
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struct zpci_dev {
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struct zpci_bus *zbus;
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struct list_head entry; /* list of all zpci_devices, needed for hotplug, etc. */
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struct list_head iommu_list;
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struct kref kref;
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struct rcu_head rcu;
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struct hotplug_slot hotplug_slot;
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enum zpci_state state;
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u32 fid; /* function ID, used by sclp */
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u32 fh; /* function handle, used by insn's */
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u32 gisa; /* GISA designation for passthrough */
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u16 vfn; /* virtual function number */
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u16 pchid; /* physical channel ID */
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u16 maxstbl; /* Maximum store block size */
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u8 pfgid; /* function group ID */
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u8 pft; /* pci function type */
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u8 port;
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u8 dtsm; /* Supported DT mask */
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u8 rid_available : 1;
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u8 has_hp_slot : 1;
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u8 has_resources : 1;
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u8 is_physfn : 1;
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u8 util_str_avail : 1;
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u8 irqs_registered : 1;
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u8 reserved : 2;
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unsigned int devfn; /* DEVFN part of the RID*/
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struct mutex lock;
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u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */
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u32 uid; /* user defined id */
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u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */
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/* IRQ stuff */
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u64 msi_addr; /* MSI address */
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unsigned int max_msi; /* maximum number of MSI's */
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unsigned int msi_first_bit;
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unsigned int msi_nr_irqs;
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struct airq_iv *aibv; /* adapter interrupt bit vector */
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unsigned long aisb; /* number of the summary bit */
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/* DMA stuff */
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unsigned long *dma_table;
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int tlb_refresh;
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spinlock_t iommu_bitmap_lock;
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unsigned long *iommu_bitmap;
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unsigned long *lazy_bitmap;
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unsigned long iommu_size;
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unsigned long iommu_pages;
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unsigned int next_bit;
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struct iommu_device iommu_dev; /* IOMMU core handle */
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char res_name[16];
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bool mio_capable;
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struct zpci_bar_struct bars[PCI_STD_NUM_BARS];
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u64 start_dma; /* Start of available DMA addresses */
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u64 end_dma; /* End of available DMA addresses */
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u64 dma_mask; /* DMA address space mask */
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/* Function measurement block */
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struct zpci_fmb *fmb;
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u16 fmb_update; /* update interval */
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u16 fmb_length;
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/* software counters */
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atomic64_t allocated_pages;
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atomic64_t mapped_pages;
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atomic64_t unmapped_pages;
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u8 version;
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enum pci_bus_speed max_bus_speed;
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struct dentry *debugfs_dev;
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/* IOMMU and passthrough */
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struct s390_domain *s390_domain; /* s390 IOMMU domain data */
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struct kvm_zdev *kzdev;
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struct mutex kzdev_lock;
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};
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static inline bool zdev_enabled(struct zpci_dev *zdev)
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{
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return (zdev->fh & (1UL << 31)) ? true : false;
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}
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extern const struct attribute_group *zpci_attr_groups[];
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extern unsigned int s390_pci_force_floating __initdata;
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extern unsigned int s390_pci_no_rid;
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extern union zpci_sic_iib *zpci_aipb;
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extern struct airq_iv *zpci_aif_sbv;
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/* -----------------------------------------------------------------------------
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Prototypes
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----------------------------------------------------------------------------- */
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/* Base stuff */
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struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state);
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int zpci_enable_device(struct zpci_dev *);
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int zpci_disable_device(struct zpci_dev *);
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int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh);
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int zpci_deconfigure_device(struct zpci_dev *zdev);
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void zpci_device_reserved(struct zpci_dev *zdev);
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bool zpci_is_device_configured(struct zpci_dev *zdev);
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int zpci_hot_reset_device(struct zpci_dev *zdev);
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int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *);
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int zpci_unregister_ioat(struct zpci_dev *, u8);
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void zpci_remove_reserved_devices(void);
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void zpci_update_fh(struct zpci_dev *zdev, u32 fh);
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/* CLP */
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int clp_setup_writeback_mio(void);
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int clp_scan_pci_devices(void);
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int clp_query_pci_fn(struct zpci_dev *zdev);
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int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as);
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int clp_disable_fh(struct zpci_dev *zdev, u32 *fh);
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int clp_get_state(u32 fid, enum zpci_state *state);
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int clp_refresh_fh(u32 fid, u32 *fh);
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/* UID */
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void update_uid_checking(bool new);
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/* IOMMU Interface */
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int zpci_init_iommu(struct zpci_dev *zdev);
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void zpci_destroy_iommu(struct zpci_dev *zdev);
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#ifdef CONFIG_PCI
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static inline bool zpci_use_mio(struct zpci_dev *zdev)
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{
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return static_branch_likely(&have_mio) && zdev->mio_capable;
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}
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/* Error handling and recovery */
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void zpci_event_error(void *);
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void zpci_event_availability(void *);
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bool zpci_is_enabled(void);
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#else /* CONFIG_PCI */
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static inline void zpci_event_error(void *e) {}
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static inline void zpci_event_availability(void *e) {}
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#endif /* CONFIG_PCI */
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#ifdef CONFIG_HOTPLUG_PCI_S390
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int zpci_init_slot(struct zpci_dev *);
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void zpci_exit_slot(struct zpci_dev *);
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#else /* CONFIG_HOTPLUG_PCI_S390 */
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static inline int zpci_init_slot(struct zpci_dev *zdev)
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{
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return 0;
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}
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static inline void zpci_exit_slot(struct zpci_dev *zdev) {}
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#endif /* CONFIG_HOTPLUG_PCI_S390 */
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/* Helpers */
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static inline struct zpci_dev *to_zpci(struct pci_dev *pdev)
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{
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struct zpci_bus *zbus = pdev->sysdata;
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return zbus->function[pdev->devfn];
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}
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static inline struct zpci_dev *to_zpci_dev(struct device *dev)
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{
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return to_zpci(to_pci_dev(dev));
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}
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struct zpci_dev *get_zdev_by_fid(u32);
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/* DMA */
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int zpci_dma_init(void);
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void zpci_dma_exit(void);
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int zpci_dma_init_device(struct zpci_dev *zdev);
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int zpci_dma_exit_device(struct zpci_dev *zdev);
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/* IRQ */
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int __init zpci_irq_init(void);
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void __init zpci_irq_exit(void);
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/* FMB */
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int zpci_fmb_enable_device(struct zpci_dev *);
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int zpci_fmb_disable_device(struct zpci_dev *);
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/* Debug */
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int zpci_debug_init(void);
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void zpci_debug_exit(void);
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void zpci_debug_init_device(struct zpci_dev *, const char *);
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void zpci_debug_exit_device(struct zpci_dev *);
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/* Error handling */
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int zpci_report_error(struct pci_dev *, struct zpci_report_error_header *);
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int zpci_clear_error_state(struct zpci_dev *zdev);
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int zpci_reset_load_store_blocked(struct zpci_dev *zdev);
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#ifdef CONFIG_NUMA
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/* Returns the node based on PCI bus */
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static inline int __pcibus_to_node(const struct pci_bus *bus)
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{
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return NUMA_NO_NODE;
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}
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static inline const struct cpumask *
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cpumask_of_pcibus(const struct pci_bus *bus)
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{
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return cpu_online_mask;
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}
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#endif /* CONFIG_NUMA */
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#endif
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