Bryan O'Donoghue f47ab3c2f5 clk: qcom: msm8916: Fix the address location of pll->config_reg ... During the process of debugging a processor derived from the msm8916 which we found the new processor was not starting one of its PLLs. After tracing the addresses and writes that downstream was doing and comparing to upstream it became obvious that we were writing to a different register location than downstream when trying to configure the PLL. This error is also present in upstream msm8916. As an example clk-pll.c::clk_pll_recalc_rate wants to write to pll->config_reg updating the bit-field POST_DIV_RATIO. That bit-field is defined in PLL_USER_CTL not in PLL_CONFIG_CTL. Taking the BIMC PLL as an example lm80-p0436-13_c_qc_snapdragon_410_processor_hrd.pdf 0x01823010 GCC_BIMC_PLL_USER_CTL 0x01823014 GCC_BIMC_PLL_CONFIG_CTL This pattern is repeated for gpll0, gpll1, gpll2 and bimc_pll. This error is likely not apparent since the bootloader will already have initialized these PLLs. This patch corrects the location of config_reg from PLL_CONFIG_CTL to PLL_USER_CTL for all relevant PLLs on msm8916. Fixes commit 3966fab8b6 ("clk: qcom: Add MSM8916 Global Clock Controller support") Cc: Georgi Djakov <georgi.djakov@linaro.org> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lkml.kernel.org/r/20200329124116.4185447-1-bryan.odonoghue@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2020-04-21 19:45:18 -07:00
..
actions	Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and 'clk-actions' into clk-next	2019-09-19 15:31:46 -07:00
analogbits	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
at91	There's not much to see in the core framework this time around. Instead the	2020-04-05 10:43:32 -07:00
axis	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
axs10x	clk: axs10x: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:17:50 -07:00
bcm	clk: bcm2835: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:16:50 -07:00
berlin	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
davinci	clk: davinci: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:17:14 -07:00
h8300	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
hisilicon	Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next	2019-11-27 08:14:17 -08:00
imgtec	drivers/clk: convert VL struct to struct_size	2019-11-08 08:36:12 -08:00
imx	There's not much to see in the core framework this time around. Instead the	2020-04-05 10:43:32 -07:00
ingenic	clk: ingenic/TCU: Fix round_rate returning error	2020-03-20 17:08:40 -07:00
keystone	clk: keystone: Add new driver to handle syscon based clocks	2020-03-20 17:07:21 -07:00
loongson1	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
mediatek	clk: Fix Kconfig indentation	2020-01-04 23:34:39 -08:00
meson	clk: meson: meson8b: set audio output clock hierarchy	2020-02-21 11:44:41 +01:00
microchip	clk: let init callback return an error code	2019-12-23 18:53:13 -08:00
mmp	clk: mmp2: Fix bit masks for LCDC I/O and pixel clocks	2020-03-20 18:19:41 -07:00
mvebu	clk: Fix Kconfig indentation	2020-01-04 23:34:39 -08:00
mxs	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159	2019-05-30 11:26:37 -07:00
nxp	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159	2019-05-30 11:26:37 -07:00
pistachio	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422	2019-06-05 17:37:15 +02:00
pxa	clk: pxa: fix one of the pxa RTC clocks	2019-11-13 15:01:17 -08:00
qcom	clk: qcom: msm8916: Fix the address location of pll->config_reg	2020-04-21 19:45:18 -07:00
renesas	clk: renesas: rcar-usb2-clock-sel: Add reset_control	2020-03-09 09:29:58 +01:00
rockchip	clk: rockchip: fix mmc get phase	2020-03-06 12:06:01 -08:00
samsung	clk: samsung: Remove redundant check in samsung_cmu_register_one	2020-02-12 15:38:44 -08:00
sifive	A few clk driver fixes	2019-05-30 16:33:37 -07:00
sirf	clk: sirf: Don't reference clk_init_data after registration	2019-08-16 10:20:07 -07:00
socfpga	clk: socfpga: stratix10: simplify parameter passing	2020-02-12 15:42:04 -08:00
spear	clk: spear: Make structure i2s_sclk_masks constant	2019-09-06 10:27:40 -07:00
sprd	clk: sprd: fix to get a correct ibias of pll	2020-04-02 18:07:58 -07:00
st	Merge branches 'clk-aspeed', 'clk-unused', 'clk-of-node-put', 'clk-const-bulk-data' and 'clk-debugfs' into clk-next	2019-09-19 15:30:40 -07:00
sunxi	clk: sunxi: use of_device_get_match_data	2019-12-09 08:49:02 +01:00
sunxi-ng	clk: sunxi-ng: sun8i-de2: Sort structures	2020-02-12 19:01:16 +01:00
tegra	clk: tegra: Use NULL for pointer initialization	2020-03-24 19:14:12 -07:00
ti	ARM: devicetree updates for v5.7	2020-04-03 15:22:05 -07:00
uniphier	clk: uniphier: Add SCSSI clock gate for each channel	2020-01-04 23:14:22 -08:00
ux500	clk: ux500: Fix up the SGA clock for some variants	2020-01-04 23:27:15 -08:00
versatile	clk: versatile: Add device tree probing for IM-PD1 clocks	2020-03-20 17:55:31 -07:00
x86	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
zte	clk: zx296718: Don't reference clk_init_data after registration	2019-08-16 10:20:15 -07:00
zynq	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 401	2019-06-05 17:37:13 +02:00
zynqmp	clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag	2020-01-23 13:25:37 -08:00
clk-asm9260.c	clk: asm9260: Use parent accuracy in fixed rate clk	2020-01-06 23:08:16 -08:00
clk-aspeed.c	clk: aspeed: Add RMII RCLK gates for both AST2500 MACs	2019-11-26 10:02:48 -08:00
clk-aspeed.h	clk: aspeed: Move structures to header	2019-09-06 15:17:02 -07:00
clk-ast2600.c	This merge window we have one small clk provider API in the core framework and	2019-12-01 16:06:02 -08:00
clk-axi-clkgen.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 177	2019-05-30 11:29:19 -07:00
clk-axm5516.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-bd718x7.c	clk: bd718x7: Support ROHM BD71828 clk block	2020-01-24 07:22:47 +00:00
clk-bm1880.c	clk: bm1800: Remove set but not used variable 'fref'	2019-12-24 00:10:33 -08:00
clk-bulk.c	clk: Make clk_bulk_get_all() return a valid "id"	2019-09-17 13:26:31 -07:00
clk-cdce706.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-cdce925.c	clk: clk-cdce925: Add regulator support	2019-09-06 10:31:16 -07:00
clk-clps711x.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-composite.c	clk: composite: add _register_composite_pdata() variants	2020-01-28 13:26:48 -08:00
clk-conf.c	clk: Tag clk core files with SPDX	2018-12-11 09:57:47 -08:00
clk-cs2000-cp.c
clk-devres.c	clk: Add devm_clk_bulk_get_optional() function	2019-06-25 14:28:01 -07:00
clk-divider.c	clk: divider: Add support for specifying parents via DT/pointers	2020-01-07 23:08:02 -08:00
clk-efm32gg.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-fixed-factor.c	Merge branch 'clk-parent-rewrite-1' into clk-next	2019-05-07 11:46:13 -07:00
clk-fixed-mmio.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-fixed-rate.c	clk: fixed-rate: Add clk flags for parent accuracy	2020-01-06 23:07:34 -08:00
clk-fractional-divider.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-fsl-sai.c	clk: fsl-sai: new driver	2020-01-28 13:26:48 -08:00
clk-gate.c	clk: gate: Add support for specifying parents via DT/pointers	2020-01-06 23:10:12 -08:00
clk-gemini.c
clk-gpio.c	clk: gpio: Use DT way of specifying parents	2020-01-05 13:34:36 -08:00
clk-hi655x.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
clk-highbank.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-hsdk-pll.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-lochnagar.c	clk: lochnagar: Don't reference clk_init_data after registration	2019-08-16 10:20:07 -07:00
clk-max9485.c
clk-max77686.c	clk: clk-max77686: Clean clkdev lookup leak and use devm	2019-02-06 10:35:03 -08:00
clk-milbeaut.c	clk: milbeaut: Don't reference clk_init_data after registration	2019-08-16 10:20:15 -07:00
clk-moxart.c
clk-multiplier.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-mux.c	clk: mux: Add support for specifying parents via DT/pointers	2020-01-06 23:10:05 -08:00
clk-nomadik.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194	2019-05-30 11:29:22 -07:00
clk-npcm7xx.c	This time it looks like a quieter release cycle in the clk tree. I guess that's	2018-10-31 11:08:30 -07:00
clk-nspire.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-oxnas.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-palmas.c	clk: palmas: constify clk_ops structure	2018-11-06 09:41:44 -08:00
clk-plldig.c	clk: ls1028a: fix a dereference of pointer 'parent' before a null check	2020-02-03 23:03:49 -08:00
clk-pwm.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-qoriq.c	clk: qoriq: add ls1088a hwaccel clocks support	2020-01-30 16:32:13 -08:00
clk-rk808.c	- Core Frameworks	2019-07-15 20:18:40 -07:00
clk-s2mps11.c	clk: s2mps11: constify clk_ops structure	2018-11-06 09:42:12 -08:00
clk-scmi.c	clk: scmi: Match scmi device by both name and protocol id	2019-12-24 11:36:46 +00:00
clk-scpi.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-si514.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-si544.c	clk: clk-si544: Implement small frequency change support	2019-06-27 13:45:38 -07:00
clk-si570.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-si5341.c	clk, clk-si5341: Support multiple input ports	2020-01-28 13:05:54 -08:00
clk-si5351.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-si5351.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-stm32f4.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-stm32h7.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-stm32mp1.c	clk: stm32mp1: Add ddrperfm clock	2019-04-29 11:13:23 -07:00
clk-tango4.c	clk: Convert to using %pOFn instead of device_node.name	2018-08-30 09:50:20 -07:00
clk-twl6040.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 336	2019-06-05 17:37:07 +02:00
clk-u300.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194	2019-05-30 11:29:22 -07:00
clk-versaclock5.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-vt8500.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282	2019-06-05 17:36:37 +02:00
clk-wm831x.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-xgene.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156	2019-05-30 11:26:35 -07:00
clk.c	There's not much to see in the core framework this time around. Instead the	2020-04-05 10:43:32 -07:00
clk.h	clk: consoldiate the __clk_get_hw() declarations	2019-07-12 11:00:14 -07:00
clkdev.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
Kconfig	There are a few changes to the core framework this time around, in addition to	2020-02-03 22:10:18 +00:00
Makefile	Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', 'clk-freescale' and 'clk-qoriq' into clk-next	2020-01-31 13:14:26 -08:00