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b253149b84
In Linux-3.9 we removed the mwait_idle() loop:69fb3676df("x86 idle: remove mwait_idle() and "idle=mwait" cmdline param") The reasoning was that modern machines should be sufficiently happy during the boot process using the default_idle() HALT loop, until cpuidle loads and either acpi_idle or intel_idle invoke the newer MWAIT-with-hints idle loop. But two machines reported problems: 1. Certain Core2-era machines support MWAIT-C1 and HALT only. MWAIT-C1 is preferred for optimal power and performance. But if they support just C1, cpuidle never loads and so they use the boot-time default idle loop forever. 2. Some laptops will boot-hang if HALT is used, but will boot successfully if MWAIT is used. This appears to be a hidden assumption in BIOS SMI, that is presumably valid on the proprietary OS where the BIOS was validated. https://bugzilla.kernel.org/show_bug.cgi?id=60770 So here we effectively revert the patch above, restoring the mwait_idle() loop. However, we don't bother restoring the idle=mwait cmdline parameter, since it appears to add no value. Maintainer notes: For 3.9, simply revert69fb3676dffor 3.10, patch -F3 applies, fuzz needed due to __cpuinit use in context For 3.11, 3.12, 3.13, this patch applies cleanly Tested-by: Mike Galbraith <bitbucket@online.de> Signed-off-by: Len Brown <len.brown@intel.com> Acked-by: Mike Galbraith <bitbucket@online.de> Cc: <stable@vger.kernel.org> # 3.9+ Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ian Malone <ibmalone@gmail.com> Cc: Josh Boyer <jwboyer@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mike Galbraith <efault@gmx.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/345254a551eb5a6a866e048d7ab570fd2193aca4.1389763084.git.len.brown@intel.com [ Ported to recent kernels. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
68 lines
1.8 KiB
C
68 lines
1.8 KiB
C
#ifndef _ASM_X86_MWAIT_H
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#define _ASM_X86_MWAIT_H
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#include <linux/sched.h>
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#define MWAIT_SUBSTATE_MASK 0xf
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#define MWAIT_CSTATE_MASK 0xf
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#define MWAIT_SUBSTATE_SIZE 4
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#define MWAIT_HINT2CSTATE(hint) (((hint) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK)
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#define MWAIT_HINT2SUBSTATE(hint) ((hint) & MWAIT_CSTATE_MASK)
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#define CPUID_MWAIT_LEAF 5
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#define CPUID5_ECX_EXTENSIONS_SUPPORTED 0x1
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#define CPUID5_ECX_INTERRUPT_BREAK 0x2
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#define MWAIT_ECX_INTERRUPT_BREAK 0x1
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static inline void __monitor(const void *eax, unsigned long ecx,
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unsigned long edx)
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{
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/* "monitor %eax, %ecx, %edx;" */
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asm volatile(".byte 0x0f, 0x01, 0xc8;"
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:: "a" (eax), "c" (ecx), "d"(edx));
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}
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static inline void __mwait(unsigned long eax, unsigned long ecx)
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{
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/* "mwait %eax, %ecx;" */
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asm volatile(".byte 0x0f, 0x01, 0xc9;"
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:: "a" (eax), "c" (ecx));
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}
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static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
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{
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trace_hardirqs_on();
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/* "mwait %eax, %ecx;" */
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asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
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:: "a" (eax), "c" (ecx));
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}
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/*
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* This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
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* which can obviate IPI to trigger checking of need_resched.
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* We execute MONITOR against need_resched and enter optimized wait state
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* through MWAIT. Whenever someone changes need_resched, we would be woken
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* up from MWAIT (without an IPI).
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*
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* New with Core Duo processors, MWAIT can take some hints based on CPU
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* capability.
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*/
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static inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
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{
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if (!current_set_polling_and_test()) {
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if (static_cpu_has_bug(X86_BUG_CLFLUSH_MONITOR)) {
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mb();
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clflush((void *)¤t_thread_info()->flags);
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mb();
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}
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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if (!need_resched())
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__mwait(eax, ecx);
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}
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current_clr_polling();
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}
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#endif /* _ASM_X86_MWAIT_H */
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