Sagar Arun Kamble f2d2fe9507 drm/i915: WaRsDisableCoarsePowerGating ... WaRsDisableCoarsePowerGating: Coarse Power Gating (CPG) needs to be disabled for platforms prior to BXT B0 and SKL GT3/GT4 till E0. v2: Added GT3/GT4 Check. Change-Id: Ia3c4c16e050c88d3e259f601054875c812d69c3a Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Alex Dai <yu.dai@intel.com> [danvet: Align continuation properly.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-09-23 10:48:49 +02:00
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drm	drm/i915: WaRsDisableCoarsePowerGating	2015-09-23 10:48:49 +02:00
host1x	gpu: host1x: mipi: Power down regulators when unused	2015-08-13 13:47:21 +02:00
ipu-v3	GPU: ipu: fix lockup caused by pending chained interrupts	2015-07-10 11:02:46 +02:00
vga	vga_switcheroo: Remove unnecessary checks	2015-08-12 17:13:19 +02:00
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00