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Most 5XX targets have GPMU (Graphics Power Management Unit) that handles a lot of the heavy lifting for power management including thermal and limits management and dynamic power collapse. While the GPMU itself is optional, it is usually nessesary to hit aggressive power targets. The GPMU firmware needs to be loaded into the GPMU at init time via a shared hardware block of registers. Using the GPU to write the microcode is more efficient than using the CPU so at first load create an indirect buffer that can be executed during subsequent initalization sequences. After loading the GPMU gets initalized through a shared register interface and then we mostly get out of its way and let it do its thing. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> |
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| .. | ||
| a2xx.xml.h | ||
| a3xx_gpu.c | ||
| a3xx_gpu.h | ||
| a3xx.xml.h | ||
| a4xx_gpu.c | ||
| a4xx_gpu.h | ||
| a4xx.xml.h | ||
| a5xx_gpu.c | ||
| a5xx_gpu.h | ||
| a5xx_power.c | ||
| a5xx.xml.h | ||
| adreno_common.xml.h | ||
| adreno_device.c | ||
| adreno_gpu.c | ||
| adreno_gpu.h | ||
| adreno_pm4.xml.h | ||