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fa729bc7c9
Currently there is no synchronisation between finalize_pkvm() and
kvm_arm_init() initcalls. The finalize_pkvm() proceeds happily even if
kvm_arm_init() fails resulting in the following warning on all the CPUs
and eventually a HYP panic:
| kvm [1]: IPA Size Limit: 48 bits
| kvm [1]: Failed to init hyp memory protection
| kvm [1]: error initializing Hyp mode: -22
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| <snip>
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| WARNING: CPU: 0 PID: 0 at arch/arm64/kvm/pkvm.c:226 _kvm_host_prot_finalize+0x30/0x50
| Modules linked in:
| CPU: 0 PID: 0 Comm: swapper/0 Not tainted 6.4.0 #237
| Hardware name: FVP Base RevC (DT)
| pstate: 634020c5 (nZCv daIF +PAN -UAO +TCO +DIT -SSBS BTYPE=--)
| pc : _kvm_host_prot_finalize+0x30/0x50
| lr : __flush_smp_call_function_queue+0xd8/0x230
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| Call trace:
| _kvm_host_prot_finalize+0x3c/0x50
| on_each_cpu_cond_mask+0x3c/0x6c
| pkvm_drop_host_privileges+0x4c/0x78
| finalize_pkvm+0x3c/0x5c
| do_one_initcall+0xcc/0x240
| do_initcall_level+0x8c/0xac
| do_initcalls+0x54/0x94
| do_basic_setup+0x1c/0x28
| kernel_init_freeable+0x100/0x16c
| kernel_init+0x20/0x1a0
| ret_from_fork+0x10/0x20
| Failed to finalize Hyp protection: -22
| dtb=fvp-base-revc.dtb
| kvm [95]: nVHE hyp BUG at: arch/arm64/kvm/hyp/nvhe/mem_protect.c:540!
| kvm [95]: nVHE call trace:
| kvm [95]: [<ffff800081052984>] __kvm_nvhe_hyp_panic+0xac/0xf8
| kvm [95]: [<ffff800081059644>] __kvm_nvhe_handle_host_mem_abort+0x1a0/0x2ac
| kvm [95]: [<ffff80008105511c>] __kvm_nvhe_handle_trap+0x4c/0x160
| kvm [95]: [<ffff8000810540fc>] __kvm_nvhe___skip_pauth_save+0x4/0x4
| kvm [95]: ---[ end nVHE call trace ]---
| kvm [95]: Hyp Offset: 0xfffe8db00ffa0000
| Kernel panic - not syncing: HYP panic:
| PS:a34023c9 PC:0000f250710b973c ESR:00000000f2000800
| FAR:ffff000800cb00d0 HPFAR:000000000880cb00 PAR:0000000000000000
| VCPU:0000000000000000
| CPU: 3 PID: 95 Comm: kworker/u16:2 Tainted: G W 6.4.0 #237
| Hardware name: FVP Base RevC (DT)
| Workqueue: rpciod rpc_async_schedule
| Call trace:
| dump_backtrace+0xec/0x108
| show_stack+0x18/0x2c
| dump_stack_lvl+0x50/0x68
| dump_stack+0x18/0x24
| panic+0x138/0x33c
| nvhe_hyp_panic_handler+0x100/0x184
| new_slab+0x23c/0x54c
| ___slab_alloc+0x3e4/0x770
| kmem_cache_alloc_node+0x1f0/0x278
| __alloc_skb+0xdc/0x294
| tcp_stream_alloc_skb+0x2c/0xf0
| tcp_sendmsg_locked+0x3d0/0xda4
| tcp_sendmsg+0x38/0x5c
| inet_sendmsg+0x44/0x60
| sock_sendmsg+0x1c/0x34
| xprt_sock_sendmsg+0xdc/0x274
| xs_tcp_send_request+0x1ac/0x28c
| xprt_transmit+0xcc/0x300
| call_transmit+0x78/0x90
| __rpc_execute+0x114/0x3d8
| rpc_async_schedule+0x28/0x48
| process_one_work+0x1d8/0x314
| worker_thread+0x248/0x474
| kthread+0xfc/0x184
| ret_from_fork+0x10/0x20
| SMP: stopping secondary CPUs
| Kernel Offset: 0x57c5cb460000 from 0xffff800080000000
| PHYS_OFFSET: 0x80000000
| CPU features: 0x00000000,1035b7a3,ccfe773f
| Memory Limit: none
| ---[ end Kernel panic - not syncing: HYP panic:
| PS:a34023c9 PC:0000f250710b973c ESR:00000000f2000800
| FAR:ffff000800cb00d0 HPFAR:000000000880cb00 PAR:0000000000000000
| VCPU:0000000000000000 ]---
Fix it by checking for the successfull initialisation of kvm_arm_init()
in finalize_pkvm() before proceeding any futher.
Fixes: 87727ba2bb
("KVM: arm64: Ensure CPU PMU probes before pKVM host de-privilege")
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Oliver Upton <oliver.upton@linux.dev>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230704193243.3300506-1-sudeep.holla@arm.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
162 lines
4.2 KiB
C
162 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#ifndef __ASM__VIRT_H
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#define __ASM__VIRT_H
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/*
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* The arm64 hcall implementation uses x0 to specify the hcall
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* number. A value less than HVC_STUB_HCALL_NR indicates a special
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* hcall, such as set vector. Any other value is handled in a
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* hypervisor specific way.
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*
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* The hypercall is allowed to clobber any of the caller-saved
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* registers (x0-x18), so it is advisable to use it through the
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* indirection of a function call (as implemented in hyp-stub.S).
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*/
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/*
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* HVC_SET_VECTORS - Set the value of the vbar_el2 register.
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*
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* @x1: Physical address of the new vector table.
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*/
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#define HVC_SET_VECTORS 0
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/*
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* HVC_SOFT_RESTART - CPU soft reset, used by the cpu_soft_restart routine.
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*/
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#define HVC_SOFT_RESTART 1
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/*
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* HVC_RESET_VECTORS - Restore the vectors to the original HYP stubs
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*/
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#define HVC_RESET_VECTORS 2
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/*
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* HVC_FINALISE_EL2 - Upgrade the CPU from EL1 to EL2, if possible
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*/
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#define HVC_FINALISE_EL2 3
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/* Max number of HYP stub hypercalls */
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#define HVC_STUB_HCALL_NR 4
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/* Error returned when an invalid stub number is passed into x0 */
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#define HVC_STUB_ERR 0xbadca11
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#define BOOT_CPU_MODE_EL1 (0xe11)
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#define BOOT_CPU_MODE_EL2 (0xe12)
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/*
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* Flags returned together with the boot mode, but not preserved in
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* __boot_cpu_mode. Used by the idreg override code to work out the
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* boot state.
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*/
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#define BOOT_CPU_FLAG_E2H BIT_ULL(32)
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#ifndef __ASSEMBLY__
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#include <asm/ptrace.h>
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#include <asm/sections.h>
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#include <asm/sysreg.h>
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#include <asm/cpufeature.h>
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/*
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* __boot_cpu_mode records what mode CPUs were booted in.
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* A correctly-implemented bootloader must start all CPUs in the same mode:
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* In this case, both 32bit halves of __boot_cpu_mode will contain the
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* same value (either 0 if booted in EL1, BOOT_CPU_MODE_EL2 if booted in EL2).
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*
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* Should the bootloader fail to do this, the two values will be different.
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* This allows the kernel to flag an error when the secondaries have come up.
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*/
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extern u32 __boot_cpu_mode[2];
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#define ARM64_VECTOR_TABLE_LEN SZ_2K
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void __hyp_set_vectors(phys_addr_t phys_vector_base);
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void __hyp_reset_vectors(void);
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bool is_kvm_arm_initialised(void);
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DECLARE_STATIC_KEY_FALSE(kvm_protected_mode_initialized);
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/* Reports the availability of HYP mode */
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static inline bool is_hyp_mode_available(void)
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{
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/*
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* If KVM protected mode is initialized, all CPUs must have been booted
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* in EL2. Avoid checking __boot_cpu_mode as CPUs now come up in EL1.
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*/
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if (IS_ENABLED(CONFIG_KVM) &&
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static_branch_likely(&kvm_protected_mode_initialized))
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return true;
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return (__boot_cpu_mode[0] == BOOT_CPU_MODE_EL2 &&
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__boot_cpu_mode[1] == BOOT_CPU_MODE_EL2);
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}
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/* Check if the bootloader has booted CPUs in different modes */
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static inline bool is_hyp_mode_mismatched(void)
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{
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/*
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* If KVM protected mode is initialized, all CPUs must have been booted
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* in EL2. Avoid checking __boot_cpu_mode as CPUs now come up in EL1.
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*/
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if (IS_ENABLED(CONFIG_KVM) &&
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static_branch_likely(&kvm_protected_mode_initialized))
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return false;
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return __boot_cpu_mode[0] != __boot_cpu_mode[1];
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}
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static __always_inline bool is_kernel_in_hyp_mode(void)
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{
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BUILD_BUG_ON(__is_defined(__KVM_NVHE_HYPERVISOR__) ||
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__is_defined(__KVM_VHE_HYPERVISOR__));
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return read_sysreg(CurrentEL) == CurrentEL_EL2;
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}
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static __always_inline bool has_vhe(void)
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{
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/*
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* Code only run in VHE/NVHE hyp context can assume VHE is present or
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* absent. Otherwise fall back to caps.
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* This allows the compiler to discard VHE-specific code from the
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* nVHE object, reducing the number of external symbol references
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* needed to link.
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*/
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if (is_vhe_hyp_code())
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return true;
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else if (is_nvhe_hyp_code())
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return false;
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else
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return cpus_have_final_cap(ARM64_HAS_VIRT_HOST_EXTN);
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}
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static __always_inline bool is_protected_kvm_enabled(void)
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{
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if (is_vhe_hyp_code())
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return false;
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else
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return cpus_have_final_cap(ARM64_KVM_PROTECTED_MODE);
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}
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static __always_inline bool has_hvhe(void)
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{
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if (is_vhe_hyp_code())
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return false;
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return cpus_have_final_cap(ARM64_KVM_HVHE);
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}
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static inline bool is_hyp_nvhe(void)
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{
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return is_hyp_mode_available() && !is_kernel_in_hyp_mode();
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}
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#endif /* __ASSEMBLY__ */
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#endif /* ! __ASM__VIRT_H */
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