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Add ECDH support for ATECC508A (I2C) device. The device features hardware acceleration for the NIST standard P256 prime curve and supports the complete key life cycle from private key generation to ECDH key agreement. Random private key generation is supported internally within the device to ensure that the private key can never be known outside of the device. If the user wants to use its own private keys, the driver will fallback to the ecdh software implementation. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
129 lines
3.7 KiB
C
129 lines
3.7 KiB
C
/*
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* Copyright (c) 2017, Microchip Technology Inc.
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* Author: Tudor Ambarus <tudor.ambarus@microchip.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef __ATMEL_ECC_H__
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#define __ATMEL_ECC_H__
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#define ATMEL_ECC_PRIORITY 300
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#define COMMAND 0x03 /* packet function */
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#define SLEEP_TOKEN 0x01
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#define WAKE_TOKEN_MAX_SIZE 8
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/* Definitions of Data and Command sizes */
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#define WORD_ADDR_SIZE 1
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#define COUNT_SIZE 1
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#define CRC_SIZE 2
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#define CMD_OVERHEAD_SIZE (COUNT_SIZE + CRC_SIZE)
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/* size in bytes of the n prime */
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#define ATMEL_ECC_NIST_P256_N_SIZE 32
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#define ATMEL_ECC_PUBKEY_SIZE (2 * ATMEL_ECC_NIST_P256_N_SIZE)
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#define STATUS_RSP_SIZE 4
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#define ECDH_RSP_SIZE (32 + CMD_OVERHEAD_SIZE)
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#define GENKEY_RSP_SIZE (ATMEL_ECC_PUBKEY_SIZE + \
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CMD_OVERHEAD_SIZE)
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#define READ_RSP_SIZE (4 + CMD_OVERHEAD_SIZE)
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#define MAX_RSP_SIZE GENKEY_RSP_SIZE
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/**
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* atmel_ecc_cmd - structure used for communicating with the device.
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* @word_addr: indicates the function of the packet sent to the device. This
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* byte should have a value of COMMAND for normal operation.
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* @count : number of bytes to be transferred to (or from) the device.
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* @opcode : the command code.
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* @param1 : the first parameter; always present.
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* @param2 : the second parameter; always present.
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* @data : optional remaining input data. Includes a 2-byte CRC.
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* @rxsize : size of the data received from i2c client.
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* @msecs : command execution time in milliseconds
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*/
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struct atmel_ecc_cmd {
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u8 word_addr;
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u8 count;
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u8 opcode;
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u8 param1;
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u16 param2;
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u8 data[MAX_RSP_SIZE];
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u8 msecs;
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u16 rxsize;
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} __packed;
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/* Status/Error codes */
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#define STATUS_SIZE 0x04
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#define STATUS_NOERR 0x00
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#define STATUS_WAKE_SUCCESSFUL 0x11
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static const struct {
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u8 value;
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const char *error_text;
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} error_list[] = {
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{ 0x01, "CheckMac or Verify miscompare" },
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{ 0x03, "Parse Error" },
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{ 0x05, "ECC Fault" },
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{ 0x0F, "Execution Error" },
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{ 0xEE, "Watchdog about to expire" },
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{ 0xFF, "CRC or other communication error" },
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};
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/* Definitions for eeprom organization */
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#define CONFIG_ZONE 0
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/* Definitions for Indexes common to all commands */
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#define RSP_DATA_IDX 1 /* buffer index of data in response */
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#define DATA_SLOT_2 2 /* used for ECDH private key */
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/* Definitions for the device lock state */
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#define DEVICE_LOCK_ADDR 0x15
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#define LOCK_VALUE_IDX (RSP_DATA_IDX + 2)
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#define LOCK_CONFIG_IDX (RSP_DATA_IDX + 3)
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/*
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* Wake High delay to data communication (microseconds). SDA should be stable
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* high for this entire duration.
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*/
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#define TWHI_MIN 1500
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#define TWHI_MAX 1550
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/* Wake Low duration */
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#define TWLO_USEC 60
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/* Command execution time (milliseconds) */
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#define MAX_EXEC_TIME_ECDH 58
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#define MAX_EXEC_TIME_GENKEY 115
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#define MAX_EXEC_TIME_READ 1
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/* Command opcode */
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#define OPCODE_ECDH 0x43
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#define OPCODE_GENKEY 0x40
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#define OPCODE_READ 0x02
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/* Definitions for the READ Command */
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#define READ_COUNT 7
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/* Definitions for the GenKey Command */
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#define GENKEY_COUNT 7
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#define GENKEY_MODE_PRIVATE 0x04
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/* Definitions for the ECDH Command */
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#define ECDH_COUNT 71
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#define ECDH_PREFIX_MODE 0x00
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#endif /* __ATMEL_ECC_H__ */
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