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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
211 lines
5.2 KiB
C
211 lines
5.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2010 John Crispin <blogic@phrozen.org>
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* Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
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* Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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* Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
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*/
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/reset-controller.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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#define LANTIQ_RCU_RESET_TIMEOUT 10000
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struct lantiq_rcu_reset_priv {
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struct reset_controller_dev rcdev;
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struct device *dev;
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struct regmap *regmap;
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u32 reset_offset;
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u32 status_offset;
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};
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static struct lantiq_rcu_reset_priv *to_lantiq_rcu_reset_priv(
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struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct lantiq_rcu_reset_priv, rcdev);
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}
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static int lantiq_rcu_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev);
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unsigned int status = (id >> 8) & 0x1f;
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u32 val;
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int ret;
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ret = regmap_read(priv->regmap, priv->status_offset, &val);
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if (ret)
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return ret;
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return !!(val & BIT(status));
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}
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static int lantiq_rcu_reset_status_timeout(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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int ret;
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int retry = LANTIQ_RCU_RESET_TIMEOUT;
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do {
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ret = lantiq_rcu_reset_status(rcdev, id);
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if (ret < 0)
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return ret;
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if (ret == assert)
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return 0;
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usleep_range(20, 40);
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} while (--retry);
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return -ETIMEDOUT;
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}
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static int lantiq_rcu_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev);
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unsigned int set = id & 0x1f;
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u32 val = assert ? BIT(set) : 0;
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int ret;
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ret = regmap_update_bits(priv->regmap, priv->reset_offset, BIT(set),
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val);
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if (ret) {
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dev_err(priv->dev, "Failed to set reset bit %u\n", set);
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return ret;
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}
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ret = lantiq_rcu_reset_status_timeout(rcdev, id, assert);
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if (ret)
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dev_err(priv->dev, "Failed to %s bit %u\n",
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assert ? "assert" : "deassert", set);
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return ret;
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}
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static int lantiq_rcu_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return lantiq_rcu_reset_update(rcdev, id, true);
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}
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static int lantiq_rcu_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return lantiq_rcu_reset_update(rcdev, id, false);
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}
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static int lantiq_rcu_reset_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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int ret;
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ret = lantiq_rcu_reset_assert(rcdev, id);
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if (ret)
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return ret;
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return lantiq_rcu_reset_deassert(rcdev, id);
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}
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static const struct reset_control_ops lantiq_rcu_reset_ops = {
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.assert = lantiq_rcu_reset_assert,
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.deassert = lantiq_rcu_reset_deassert,
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.status = lantiq_rcu_reset_status,
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.reset = lantiq_rcu_reset_reset,
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};
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static int lantiq_rcu_reset_of_parse(struct platform_device *pdev,
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struct lantiq_rcu_reset_priv *priv)
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{
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struct device *dev = &pdev->dev;
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const __be32 *offset;
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priv->regmap = syscon_node_to_regmap(dev->of_node->parent);
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if (IS_ERR(priv->regmap)) {
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dev_err(&pdev->dev, "Failed to lookup RCU regmap\n");
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return PTR_ERR(priv->regmap);
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}
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offset = of_get_address(dev->of_node, 0, NULL, NULL);
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if (!offset) {
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dev_err(&pdev->dev, "Failed to get RCU reset offset\n");
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return -ENOENT;
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}
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priv->reset_offset = __be32_to_cpu(*offset);
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offset = of_get_address(dev->of_node, 1, NULL, NULL);
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if (!offset) {
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dev_err(&pdev->dev, "Failed to get RCU status offset\n");
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return -ENOENT;
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}
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priv->status_offset = __be32_to_cpu(*offset);
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return 0;
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}
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static int lantiq_rcu_reset_xlate(struct reset_controller_dev *rcdev,
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const struct of_phandle_args *reset_spec)
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{
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unsigned int status, set;
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set = reset_spec->args[0];
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status = reset_spec->args[1];
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if (set >= rcdev->nr_resets || status >= rcdev->nr_resets)
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return -EINVAL;
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return (status << 8) | set;
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}
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static int lantiq_rcu_reset_probe(struct platform_device *pdev)
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{
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struct lantiq_rcu_reset_priv *priv;
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int err;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = &pdev->dev;
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platform_set_drvdata(pdev, priv);
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err = lantiq_rcu_reset_of_parse(pdev, priv);
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if (err)
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return err;
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priv->rcdev.ops = &lantiq_rcu_reset_ops;
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priv->rcdev.owner = THIS_MODULE;
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priv->rcdev.of_node = pdev->dev.of_node;
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priv->rcdev.nr_resets = 32;
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priv->rcdev.of_xlate = lantiq_rcu_reset_xlate;
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priv->rcdev.of_reset_n_cells = 2;
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return reset_controller_register(&priv->rcdev);
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}
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static const struct of_device_id lantiq_rcu_reset_dt_ids[] = {
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{ .compatible = "lantiq,danube-reset", },
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{ .compatible = "lantiq,xrx200-reset", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, lantiq_rcu_reset_dt_ids);
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static struct platform_driver lantiq_rcu_reset_driver = {
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.probe = lantiq_rcu_reset_probe,
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.driver = {
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.name = "lantiq-reset",
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.of_match_table = lantiq_rcu_reset_dt_ids,
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},
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};
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module_platform_driver(lantiq_rcu_reset_driver);
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MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
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MODULE_DESCRIPTION("Lantiq XWAY RCU Reset Controller Driver");
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MODULE_LICENSE("GPL");
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