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Some hardware will ignore bit TRCPDCR.PU which is used to signal to hardware that power should not be removed from the trace unit. Let's mitigate against this by conditionally saving and restoring the trace unit state when the CPU enters low power states. This patchset introduces a firmware property named 'arm,coresight-loses-context-with-cpu' - when this is present the hardware state will be conditionally saved and restored. A module parameter 'pm_save_enable' is also introduced which can be configured to override the firmware property. This can be set to never allow save/restore or to conditionally allow it (only for self-hosted). The default value is determined by firmware. We avoid saving the hardware state when self-hosted coresight isn't in use to reduce PM latency - we can't determine this by reading the claim tags (TRCCLAIMCLR) as these are 'trace' registers which need power and clocking, something we can't easily provide in the PM context. Therefore we rely on the existing drvdata->mode internal state that is set when self-hosted coresight is used (and powered). Signed-off-by: Andrew Murray <andrew.murray@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20191104181251.26732-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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.. | ||
coresight-catu.c | ||
coresight-catu.h | ||
coresight-cpu-debug.c | ||
coresight-etb10.c | ||
coresight-etm3x-sysfs.c | ||
coresight-etm3x.c | ||
coresight-etm4x-sysfs.c | ||
coresight-etm4x.c | ||
coresight-etm4x.h | ||
coresight-etm-cp14.c | ||
coresight-etm-perf.c | ||
coresight-etm-perf.h | ||
coresight-etm.h | ||
coresight-funnel.c | ||
coresight-platform.c | ||
coresight-priv.h | ||
coresight-replicator.c | ||
coresight-stm.c | ||
coresight-tmc-etf.c | ||
coresight-tmc-etr.c | ||
coresight-tmc.c | ||
coresight-tmc.h | ||
coresight-tpiu.c | ||
coresight.c | ||
Kconfig | ||
Makefile |