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There are some switches that will do write combining when they see two sequential regions written. In order to avoid any possible write combining issues it is necessary to add a flush after writing each piece of a rar register. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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e1000_82575.c | ||
e1000_82575.h | ||
e1000_defines.h | ||
e1000_hw.h | ||
e1000_mac.c | ||
e1000_mac.h | ||
e1000_mbx.c | ||
e1000_mbx.h | ||
e1000_nvm.c | ||
e1000_nvm.h | ||
e1000_phy.c | ||
e1000_phy.h | ||
e1000_regs.h | ||
igb_ethtool.c | ||
igb_main.c | ||
igb.h | ||
Makefile |