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e0152e7481
* Support for the new "riscv,isa-extensions" and "riscv,isa-base" device tree interfaces for probing extensions. * Support for userspace access to the performance counters. * Support for more instructions in kprobes. * Crash kernels can be allocated above 4GiB. * Support for KCFI. * Support for ELFs in !MMU configurations. * ARCH_KMALLOC_MINALIGN has been reduced to 8. * mmap() defaults to sv48-sized addresses, with longer addresses hidden behind a hint (similar to Arm and Intel). * Also various fixes and cleanups. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmTx96kTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiVjRD/9DYVLlkQ/OEDJjPaEcYCP49xgIVUUU lhs3XbSs2VNHBaiG114f6Q0AaT/uNi+uqSej3CeTmEot2kZkBk/f2yu+UNIriPZ9 GQiZsdyXhu921C+5VFtiI47KDWOVZ+Jpy3M1ll61IWt3yPSQHr1xOP0AOiyHHqe3 cmqpNnzjajlfVDoXPc2mGGzUJt/7ar4thcwnMNi98raXR5Qh7SP6rrHjoQhE1oFk LMP3CHqEAcHE2tE4CxZVpc6HOQ5m0LpQIOK7ypufGMyoIYESm5dt/JOT4MlhTtDw 6JzyVKtiM7lartUnUaW3ZoX4trQYT5gbXxWrJ2gCnUGy3VulikoXr1Rpz0qfdeOR XN8OLkVAqHfTGFI7oKk24f9Adw96R5NPZcdCay90h4J/kMfCiC7ZyUUI1XIa5iy1 np5pZCkf8HNcdywML7qcFd5n2O0wchyFnRLFZo6kJP9Ls5cEi6kBx/1jSdTcNgx/ fUKXyoEcriGoQiiwn29+4RZnU69gJV3zqQNLPpuwDQ5F/Q1zHTlrr+dqzezKkzcO dRTV2d2Q4A5vIDXPptzNNLlRQdrc8qxPJ1lxQVkPIU4/mtqczmZBwlyY2u9zwPyS sehJgJZnoAf+jm71NgQAKLck4MUBsMnMogOWunhXkVRCoZlbbkUWX4ECZYwPKsVk W7zVPmLvSM0l5g== =/tXb -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for the new "riscv,isa-extensions" and "riscv,isa-base" device tree interfaces for probing extensions - Support for userspace access to the performance counters - Support for more instructions in kprobes - Crash kernels can be allocated above 4GiB - Support for KCFI - Support for ELFs in !MMU configurations - ARCH_KMALLOC_MINALIGN has been reduced to 8 - mmap() defaults to sv48-sized addresses, with longer addresses hidden behind a hint (similar to Arm and Intel) - Also various fixes and cleanups * tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (51 commits) lib/Kconfig.debug: Restrict DEBUG_INFO_SPLIT for RISC-V riscv: support PREEMPT_DYNAMIC with static keys riscv: Move create_tmp_mapping() to init sections riscv: Mark KASAN tmp* page tables variables as static riscv: mm: use bitmap_zero() API riscv: enable DEBUG_FORCE_FUNCTION_ALIGN_64B riscv: remove redundant mv instructions RISC-V: mm: Document mmap changes RISC-V: mm: Update pgtable comment documentation RISC-V: mm: Add tests for RISC-V mm RISC-V: mm: Restrict address space for sv39,sv48,sv57 riscv: enable DMA_BOUNCE_UNALIGNED_KMALLOC for !dma_coherent riscv: allow kmalloc() caches aligned to the smallest value riscv: support the elf-fdpic binfmt loader binfmt_elf_fdpic: support 64-bit systems riscv: Allow CONFIG_CFI_CLANG to be selected riscv/purgatory: Disable CFI riscv: Add CFI error handling riscv: Add ftrace_stub_graph riscv: Add types to indirectly called assembly functions ...
462 lines
12 KiB
C
462 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#include <linux/cpu.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/sched/debug.h>
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#include <linux/sched/signal.h>
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#include <linux/signal.h>
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#include <linux/kdebug.h>
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#include <linux/uaccess.h>
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#include <linux/kprobes.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/kexec.h>
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#include <linux/entry-common.h>
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#include <asm/asm-prototypes.h>
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#include <asm/bug.h>
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#include <asm/cfi.h>
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#include <asm/csr.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/syscall.h>
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#include <asm/thread_info.h>
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#include <asm/vector.h>
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#include <asm/irq_stack.h>
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int show_unhandled_signals = 1;
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static DEFINE_SPINLOCK(die_lock);
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static void dump_kernel_instr(const char *loglvl, struct pt_regs *regs)
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{
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char str[sizeof("0000 ") * 12 + 2 + 1], *p = str;
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const u16 *insns = (u16 *)instruction_pointer(regs);
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long bad;
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u16 val;
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int i;
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for (i = -10; i < 2; i++) {
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bad = get_kernel_nofault(val, &insns[i]);
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if (!bad) {
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p += sprintf(p, i == 0 ? "(%04hx) " : "%04hx ", val);
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} else {
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printk("%sCode: Unable to access instruction at 0x%px.\n",
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loglvl, &insns[i]);
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return;
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}
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}
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printk("%sCode: %s\n", loglvl, str);
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}
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void die(struct pt_regs *regs, const char *str)
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{
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static int die_counter;
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int ret;
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long cause;
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unsigned long flags;
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oops_enter();
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spin_lock_irqsave(&die_lock, flags);
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console_verbose();
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bust_spinlocks(1);
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pr_emerg("%s [#%d]\n", str, ++die_counter);
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print_modules();
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if (regs) {
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show_regs(regs);
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dump_kernel_instr(KERN_EMERG, regs);
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}
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cause = regs ? regs->cause : -1;
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ret = notify_die(DIE_OOPS, str, regs, 0, cause, SIGSEGV);
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if (kexec_should_crash(current))
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crash_kexec(regs);
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bust_spinlocks(0);
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add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
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spin_unlock_irqrestore(&die_lock, flags);
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oops_exit();
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception");
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if (ret != NOTIFY_STOP)
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make_task_dead(SIGSEGV);
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}
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void do_trap(struct pt_regs *regs, int signo, int code, unsigned long addr)
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{
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struct task_struct *tsk = current;
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if (show_unhandled_signals && unhandled_signal(tsk, signo)
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&& printk_ratelimit()) {
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pr_info("%s[%d]: unhandled signal %d code 0x%x at 0x" REG_FMT,
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tsk->comm, task_pid_nr(tsk), signo, code, addr);
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print_vma_addr(KERN_CONT " in ", instruction_pointer(regs));
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pr_cont("\n");
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__show_regs(regs);
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}
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force_sig_fault(signo, code, (void __user *)addr);
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}
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static void do_trap_error(struct pt_regs *regs, int signo, int code,
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unsigned long addr, const char *str)
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{
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current->thread.bad_cause = regs->cause;
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if (user_mode(regs)) {
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do_trap(regs, signo, code, addr);
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} else {
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if (!fixup_exception(regs))
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die(regs, str);
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}
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}
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#if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_RISCV_ALTERNATIVE)
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#define __trap_section __noinstr_section(".xip.traps")
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#else
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#define __trap_section noinstr
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#endif
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#define DO_ERROR_INFO(name, signo, code, str) \
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asmlinkage __visible __trap_section void name(struct pt_regs *regs) \
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{ \
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if (user_mode(regs)) { \
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irqentry_enter_from_user_mode(regs); \
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do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \
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irqentry_exit_to_user_mode(regs); \
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} else { \
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irqentry_state_t state = irqentry_nmi_enter(regs); \
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do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \
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irqentry_nmi_exit(regs, state); \
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} \
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}
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DO_ERROR_INFO(do_trap_unknown,
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SIGILL, ILL_ILLTRP, "unknown exception");
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DO_ERROR_INFO(do_trap_insn_misaligned,
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SIGBUS, BUS_ADRALN, "instruction address misaligned");
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DO_ERROR_INFO(do_trap_insn_fault,
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SIGSEGV, SEGV_ACCERR, "instruction access fault");
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asmlinkage __visible __trap_section void do_trap_insn_illegal(struct pt_regs *regs)
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{
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bool handled;
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if (user_mode(regs)) {
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irqentry_enter_from_user_mode(regs);
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local_irq_enable();
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handled = riscv_v_first_use_handler(regs);
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local_irq_disable();
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if (!handled)
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do_trap_error(regs, SIGILL, ILL_ILLOPC, regs->epc,
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"Oops - illegal instruction");
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irqentry_exit_to_user_mode(regs);
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} else {
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irqentry_state_t state = irqentry_nmi_enter(regs);
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do_trap_error(regs, SIGILL, ILL_ILLOPC, regs->epc,
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"Oops - illegal instruction");
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irqentry_nmi_exit(regs, state);
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}
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}
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DO_ERROR_INFO(do_trap_load_fault,
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SIGSEGV, SEGV_ACCERR, "load access fault");
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#ifndef CONFIG_RISCV_M_MODE
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DO_ERROR_INFO(do_trap_load_misaligned,
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SIGBUS, BUS_ADRALN, "Oops - load address misaligned");
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DO_ERROR_INFO(do_trap_store_misaligned,
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SIGBUS, BUS_ADRALN, "Oops - store (or AMO) address misaligned");
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#else
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int handle_misaligned_load(struct pt_regs *regs);
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int handle_misaligned_store(struct pt_regs *regs);
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asmlinkage __visible __trap_section void do_trap_load_misaligned(struct pt_regs *regs)
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{
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if (user_mode(regs)) {
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irqentry_enter_from_user_mode(regs);
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if (handle_misaligned_load(regs))
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do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
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"Oops - load address misaligned");
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irqentry_exit_to_user_mode(regs);
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} else {
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irqentry_state_t state = irqentry_nmi_enter(regs);
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if (handle_misaligned_load(regs))
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do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
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"Oops - load address misaligned");
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irqentry_nmi_exit(regs, state);
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}
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}
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asmlinkage __visible __trap_section void do_trap_store_misaligned(struct pt_regs *regs)
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{
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if (user_mode(regs)) {
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irqentry_enter_from_user_mode(regs);
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if (handle_misaligned_store(regs))
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do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
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"Oops - store (or AMO) address misaligned");
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irqentry_exit_to_user_mode(regs);
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} else {
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irqentry_state_t state = irqentry_nmi_enter(regs);
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if (handle_misaligned_store(regs))
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do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
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"Oops - store (or AMO) address misaligned");
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irqentry_nmi_exit(regs, state);
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}
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}
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#endif
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DO_ERROR_INFO(do_trap_store_fault,
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SIGSEGV, SEGV_ACCERR, "store (or AMO) access fault");
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DO_ERROR_INFO(do_trap_ecall_s,
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SIGILL, ILL_ILLTRP, "environment call from S-mode");
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DO_ERROR_INFO(do_trap_ecall_m,
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SIGILL, ILL_ILLTRP, "environment call from M-mode");
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static inline unsigned long get_break_insn_length(unsigned long pc)
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{
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bug_insn_t insn;
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if (get_kernel_nofault(insn, (bug_insn_t *)pc))
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return 0;
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return GET_INSN_LENGTH(insn);
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}
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void handle_break(struct pt_regs *regs)
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{
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#ifdef CONFIG_KPROBES
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if (kprobe_single_step_handler(regs))
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return;
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if (kprobe_breakpoint_handler(regs))
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return;
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#endif
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#ifdef CONFIG_UPROBES
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if (uprobe_single_step_handler(regs))
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return;
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if (uprobe_breakpoint_handler(regs))
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return;
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#endif
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current->thread.bad_cause = regs->cause;
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if (user_mode(regs))
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force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->epc);
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#ifdef CONFIG_KGDB
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else if (notify_die(DIE_TRAP, "EBREAK", regs, 0, regs->cause, SIGTRAP)
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== NOTIFY_STOP)
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return;
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#endif
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else if (report_bug(regs->epc, regs) == BUG_TRAP_TYPE_WARN ||
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handle_cfi_failure(regs) == BUG_TRAP_TYPE_WARN)
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regs->epc += get_break_insn_length(regs->epc);
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else
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die(regs, "Kernel BUG");
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}
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asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
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{
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if (user_mode(regs)) {
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irqentry_enter_from_user_mode(regs);
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handle_break(regs);
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irqentry_exit_to_user_mode(regs);
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} else {
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irqentry_state_t state = irqentry_nmi_enter(regs);
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handle_break(regs);
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irqentry_nmi_exit(regs, state);
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}
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}
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asmlinkage __visible __trap_section void do_trap_ecall_u(struct pt_regs *regs)
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{
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if (user_mode(regs)) {
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long syscall = regs->a7;
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regs->epc += 4;
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regs->orig_a0 = regs->a0;
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riscv_v_vstate_discard(regs);
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syscall = syscall_enter_from_user_mode(regs, syscall);
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if (syscall >= 0 && syscall < NR_syscalls)
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syscall_handler(regs, syscall);
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else if (syscall != -1)
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regs->a0 = -ENOSYS;
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syscall_exit_to_user_mode(regs);
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} else {
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irqentry_state_t state = irqentry_nmi_enter(regs);
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do_trap_error(regs, SIGILL, ILL_ILLTRP, regs->epc,
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"Oops - environment call from U-mode");
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irqentry_nmi_exit(regs, state);
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}
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}
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#ifdef CONFIG_MMU
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asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs)
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{
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irqentry_state_t state = irqentry_enter(regs);
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handle_page_fault(regs);
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local_irq_disable();
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irqentry_exit(regs, state);
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}
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#endif
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static void noinstr handle_riscv_irq(struct pt_regs *regs)
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{
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struct pt_regs *old_regs;
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irq_enter_rcu();
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old_regs = set_irq_regs(regs);
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handle_arch_irq(regs);
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set_irq_regs(old_regs);
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irq_exit_rcu();
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}
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asmlinkage void noinstr do_irq(struct pt_regs *regs)
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{
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irqentry_state_t state = irqentry_enter(regs);
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#ifdef CONFIG_IRQ_STACKS
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if (on_thread_stack()) {
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ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id())
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+ IRQ_STACK_SIZE/sizeof(ulong);
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__asm__ __volatile(
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"addi sp, sp, -"RISCV_SZPTR "\n"
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REG_S" ra, (sp) \n"
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"addi sp, sp, -"RISCV_SZPTR "\n"
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REG_S" s0, (sp) \n"
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"addi s0, sp, 2*"RISCV_SZPTR "\n"
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"move sp, %[sp] \n"
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"move a0, %[regs] \n"
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"call handle_riscv_irq \n"
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"addi sp, s0, -2*"RISCV_SZPTR"\n"
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REG_L" s0, (sp) \n"
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"addi sp, sp, "RISCV_SZPTR "\n"
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REG_L" ra, (sp) \n"
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"addi sp, sp, "RISCV_SZPTR "\n"
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:
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: [sp] "r" (sp), [regs] "r" (regs)
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: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
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"t0", "t1", "t2", "t3", "t4", "t5", "t6",
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#ifndef CONFIG_FRAME_POINTER
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"s0",
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#endif
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"memory");
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} else
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#endif
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handle_riscv_irq(regs);
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irqentry_exit(regs, state);
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}
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#ifdef CONFIG_GENERIC_BUG
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int is_valid_bugaddr(unsigned long pc)
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{
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bug_insn_t insn;
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if (pc < VMALLOC_START)
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return 0;
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if (get_kernel_nofault(insn, (bug_insn_t *)pc))
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return 0;
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if ((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32)
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return (insn == __BUG_INSN_32);
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else
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return ((insn & __COMPRESSED_INSN_MASK) == __BUG_INSN_16);
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}
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#endif /* CONFIG_GENERIC_BUG */
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#ifdef CONFIG_VMAP_STACK
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/*
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* Extra stack space that allows us to provide panic messages when the kernel
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* has overflowed its stack.
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*/
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static DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)],
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overflow_stack)__aligned(16);
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/*
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* A temporary stack for use by handle_kernel_stack_overflow. This is used so
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* we can call into C code to get the per-hart overflow stack. Usage of this
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* stack must be protected by spin_shadow_stack.
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*/
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long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)] __aligned(16);
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/*
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* A pseudo spinlock to protect the shadow stack from being used by multiple
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* harts concurrently. This isn't a real spinlock because the lock side must
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* be taken without a valid stack and only a single register, it's only taken
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* while in the process of panicing anyway so the performance and error
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* checking a proper spinlock gives us doesn't matter.
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*/
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unsigned long spin_shadow_stack;
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asmlinkage unsigned long get_overflow_stack(void)
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{
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return (unsigned long)this_cpu_ptr(overflow_stack) +
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OVERFLOW_STACK_SIZE;
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}
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asmlinkage void handle_bad_stack(struct pt_regs *regs)
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{
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unsigned long tsk_stk = (unsigned long)current->stack;
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unsigned long ovf_stk = (unsigned long)this_cpu_ptr(overflow_stack);
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/*
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* We're done with the shadow stack by this point, as we're on the
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* overflow stack. Tell any other concurrent overflowing harts that
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* they can proceed with panicing by releasing the pseudo-spinlock.
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*
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* This pairs with an amoswap.aq in handle_kernel_stack_overflow.
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*/
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smp_store_release(&spin_shadow_stack, 0);
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console_verbose();
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pr_emerg("Insufficient stack space to handle exception!\n");
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pr_emerg("Task stack: [0x%016lx..0x%016lx]\n",
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tsk_stk, tsk_stk + THREAD_SIZE);
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pr_emerg("Overflow stack: [0x%016lx..0x%016lx]\n",
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ovf_stk, ovf_stk + OVERFLOW_STACK_SIZE);
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__show_regs(regs);
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panic("Kernel stack overflow");
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for (;;)
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wait_for_interrupt();
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}
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#endif
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