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2103f6cba6
Architectures should fully validate whether kexec is possible as part of machine_kexec_prepare(), so that user-space's kexec_load() operation can report any problems. Performing validation in machine_kexec() itself is too late, since it is not allowed to return. Prior to this patch, ARM's machine_kexec() was testing after-the-fact whether machine_kexec_prepare() was able to disable all but one CPU. Instead, modify machine_kexec_prepare() to validate all conditions necessary for machine_kexec_prepare()'s to succeed. BUG if the validation succeeded, yet disabling the CPUs didn't actually work. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
95 lines
1.9 KiB
C
95 lines
1.9 KiB
C
/*
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* ARM specific SMP header, this contains our implementation
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* details.
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*/
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#ifndef __ASMARM_SMP_PLAT_H
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#define __ASMARM_SMP_PLAT_H
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <asm/cputype.h>
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/*
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* Return true if we are running on a SMP platform
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*/
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static inline bool is_smp(void)
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{
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#ifndef CONFIG_SMP
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return false;
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#elif defined(CONFIG_SMP_ON_UP)
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extern unsigned int smp_on_up;
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return !!smp_on_up;
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#else
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return true;
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#endif
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}
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/* all SMP configurations have the extended CPUID registers */
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#ifndef CONFIG_MMU
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#define tlb_ops_need_broadcast() 0
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#else
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static inline int tlb_ops_need_broadcast(void)
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{
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if (!is_smp())
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return 0;
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
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}
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#endif
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#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
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#define cache_ops_need_broadcast() 0
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#else
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static inline int cache_ops_need_broadcast(void)
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{
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if (!is_smp())
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return 0;
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
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}
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#endif
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/*
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* Logical CPU mapping.
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*/
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extern u32 __cpu_logical_map[];
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#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
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/*
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* Retrieve logical cpu index corresponding to a given MPIDR[23:0]
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* - mpidr: MPIDR[23:0] to be used for the look-up
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*
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* Returns the cpu logical index or -EINVAL on look-up error
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*/
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static inline int get_logical_index(u32 mpidr)
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{
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int cpu;
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for (cpu = 0; cpu < nr_cpu_ids; cpu++)
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if (cpu_logical_map(cpu) == mpidr)
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return cpu;
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return -EINVAL;
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}
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/*
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* NOTE ! Assembly code relies on the following
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* structure memory layout in order to carry out load
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* multiple from its base address. For more
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* information check arch/arm/kernel/sleep.S
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*/
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struct mpidr_hash {
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u32 mask; /* used by sleep.S */
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u32 shift_aff[3]; /* used by sleep.S */
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u32 bits;
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};
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extern struct mpidr_hash mpidr_hash;
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static inline u32 mpidr_hash_size(void)
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{
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return 1 << mpidr_hash.bits;
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}
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extern int platform_can_cpu_hotplug(void);
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#endif
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