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619064afa9
The userspace accessors have an early call to vgic_{get,set}_common_attr() that makes the code hard to follow. Move it to the default: clause of the decoding switch statement, which results in a nice cleanup. This requires us to move the handling of the pending table into the common handling, even if it is strictly a GICv3 feature (it has the benefit of keeping the whole control group handling in the same function). Also cleanup vgic_v3_{get,set}_attr() while we're at it, deduplicating the calls to vgic_v3_attr_regs_access(). Suggested-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
696 lines
16 KiB
C
696 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* VGIC: KVM DEVICE API
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*
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* Copyright (C) 2015 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#include <linux/kvm_host.h>
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#include <kvm/arm_vgic.h>
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#include <linux/uaccess.h>
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#include <asm/kvm_mmu.h>
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#include <asm/cputype.h>
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#include "vgic.h"
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/* common helpers */
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int vgic_check_iorange(struct kvm *kvm, phys_addr_t ioaddr,
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phys_addr_t addr, phys_addr_t alignment,
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phys_addr_t size)
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{
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if (!IS_VGIC_ADDR_UNDEF(ioaddr))
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return -EEXIST;
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if (!IS_ALIGNED(addr, alignment) || !IS_ALIGNED(size, alignment))
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return -EINVAL;
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if (addr + size < addr)
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return -EINVAL;
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if (addr & ~kvm_phys_mask(kvm) || addr + size > kvm_phys_size(kvm))
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return -E2BIG;
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return 0;
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}
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static int vgic_check_type(struct kvm *kvm, int type_needed)
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{
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if (kvm->arch.vgic.vgic_model != type_needed)
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return -ENODEV;
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else
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return 0;
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}
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int kvm_set_legacy_vgic_v2_addr(struct kvm *kvm, struct kvm_arm_device_addr *dev_addr)
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{
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struct vgic_dist *vgic = &kvm->arch.vgic;
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int r;
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mutex_lock(&kvm->lock);
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switch (FIELD_GET(KVM_ARM_DEVICE_TYPE_MASK, dev_addr->id)) {
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case KVM_VGIC_V2_ADDR_TYPE_DIST:
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r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
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if (!r)
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r = vgic_check_iorange(kvm, vgic->vgic_dist_base, dev_addr->addr,
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SZ_4K, KVM_VGIC_V2_DIST_SIZE);
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if (!r)
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vgic->vgic_dist_base = dev_addr->addr;
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break;
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case KVM_VGIC_V2_ADDR_TYPE_CPU:
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r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
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if (!r)
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r = vgic_check_iorange(kvm, vgic->vgic_cpu_base, dev_addr->addr,
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SZ_4K, KVM_VGIC_V2_CPU_SIZE);
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if (!r)
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vgic->vgic_cpu_base = dev_addr->addr;
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break;
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default:
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r = -ENODEV;
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}
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mutex_unlock(&kvm->lock);
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return r;
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}
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/**
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* kvm_vgic_addr - set or get vgic VM base addresses
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* @kvm: pointer to the vm struct
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* @attr: pointer to the attribute being retrieved/updated
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* @write: if true set the address in the VM address space, if false read the
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* address
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*
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* Set or get the vgic base addresses for the distributor and the virtual CPU
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* interface in the VM physical address space. These addresses are properties
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* of the emulated core/SoC and therefore user space initially knows this
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* information.
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* Check them for sanity (alignment, double assignment). We can't check for
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* overlapping regions in case of a virtual GICv3 here, since we don't know
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* the number of VCPUs yet, so we defer this check to map_resources().
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*/
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static int kvm_vgic_addr(struct kvm *kvm, struct kvm_device_attr *attr, bool write)
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{
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u64 __user *uaddr = (u64 __user *)attr->addr;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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phys_addr_t *addr_ptr, alignment, size;
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u64 undef_value = VGIC_ADDR_UNDEF;
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u64 addr;
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int r;
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/* Reading a redistributor region addr implies getting the index */
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if (write || attr->attr == KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION)
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if (get_user(addr, uaddr))
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return -EFAULT;
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mutex_lock(&kvm->lock);
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switch (attr->attr) {
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case KVM_VGIC_V2_ADDR_TYPE_DIST:
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r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
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addr_ptr = &vgic->vgic_dist_base;
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alignment = SZ_4K;
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size = KVM_VGIC_V2_DIST_SIZE;
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break;
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case KVM_VGIC_V2_ADDR_TYPE_CPU:
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r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
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addr_ptr = &vgic->vgic_cpu_base;
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alignment = SZ_4K;
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size = KVM_VGIC_V2_CPU_SIZE;
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break;
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case KVM_VGIC_V3_ADDR_TYPE_DIST:
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r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3);
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addr_ptr = &vgic->vgic_dist_base;
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alignment = SZ_64K;
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size = KVM_VGIC_V3_DIST_SIZE;
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break;
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case KVM_VGIC_V3_ADDR_TYPE_REDIST: {
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struct vgic_redist_region *rdreg;
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r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3);
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if (r)
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break;
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if (write) {
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r = vgic_v3_set_redist_base(kvm, 0, addr, 0);
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goto out;
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}
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rdreg = list_first_entry_or_null(&vgic->rd_regions,
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struct vgic_redist_region, list);
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if (!rdreg)
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addr_ptr = &undef_value;
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else
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addr_ptr = &rdreg->base;
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break;
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}
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case KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION:
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{
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struct vgic_redist_region *rdreg;
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u8 index;
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r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3);
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if (r)
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break;
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index = addr & KVM_VGIC_V3_RDIST_INDEX_MASK;
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if (write) {
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gpa_t base = addr & KVM_VGIC_V3_RDIST_BASE_MASK;
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u32 count = FIELD_GET(KVM_VGIC_V3_RDIST_COUNT_MASK, addr);
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u8 flags = FIELD_GET(KVM_VGIC_V3_RDIST_FLAGS_MASK, addr);
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if (!count || flags)
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r = -EINVAL;
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else
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r = vgic_v3_set_redist_base(kvm, index,
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base, count);
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goto out;
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}
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rdreg = vgic_v3_rdist_region_from_index(kvm, index);
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if (!rdreg) {
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r = -ENOENT;
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goto out;
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}
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addr = index;
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addr |= rdreg->base;
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addr |= (u64)rdreg->count << KVM_VGIC_V3_RDIST_COUNT_SHIFT;
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goto out;
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}
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default:
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r = -ENODEV;
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}
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if (r)
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goto out;
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if (write) {
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r = vgic_check_iorange(kvm, *addr_ptr, addr, alignment, size);
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if (!r)
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*addr_ptr = addr;
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} else {
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addr = *addr_ptr;
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}
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out:
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mutex_unlock(&kvm->lock);
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if (!r && !write)
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r = put_user(addr, uaddr);
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return r;
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}
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static int vgic_set_common_attr(struct kvm_device *dev,
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struct kvm_device_attr *attr)
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{
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int r;
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switch (attr->group) {
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case KVM_DEV_ARM_VGIC_GRP_ADDR:
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r = kvm_vgic_addr(dev->kvm, attr, true);
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return (r == -ENODEV) ? -ENXIO : r;
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case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
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u32 __user *uaddr = (u32 __user *)(long)attr->addr;
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u32 val;
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int ret = 0;
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if (get_user(val, uaddr))
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return -EFAULT;
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/*
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* We require:
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* - at least 32 SPIs on top of the 16 SGIs and 16 PPIs
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* - at most 1024 interrupts
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* - a multiple of 32 interrupts
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*/
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if (val < (VGIC_NR_PRIVATE_IRQS + 32) ||
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val > VGIC_MAX_RESERVED ||
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(val & 31))
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return -EINVAL;
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mutex_lock(&dev->kvm->lock);
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if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis)
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ret = -EBUSY;
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else
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dev->kvm->arch.vgic.nr_spis =
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val - VGIC_NR_PRIVATE_IRQS;
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mutex_unlock(&dev->kvm->lock);
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return ret;
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}
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case KVM_DEV_ARM_VGIC_GRP_CTRL: {
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switch (attr->attr) {
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case KVM_DEV_ARM_VGIC_CTRL_INIT:
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mutex_lock(&dev->kvm->lock);
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r = vgic_init(dev->kvm);
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mutex_unlock(&dev->kvm->lock);
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return r;
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case KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES:
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/*
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* OK, this one isn't common at all, but we
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* want to handle all control group attributes
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* in a single place.
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*/
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if (vgic_check_type(dev->kvm, KVM_DEV_TYPE_ARM_VGIC_V3))
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return -ENXIO;
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mutex_lock(&dev->kvm->lock);
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if (!lock_all_vcpus(dev->kvm)) {
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mutex_unlock(&dev->kvm->lock);
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return -EBUSY;
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}
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r = vgic_v3_save_pending_tables(dev->kvm);
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unlock_all_vcpus(dev->kvm);
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mutex_unlock(&dev->kvm->lock);
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return r;
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}
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break;
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}
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}
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return -ENXIO;
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}
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static int vgic_get_common_attr(struct kvm_device *dev,
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struct kvm_device_attr *attr)
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{
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int r = -ENXIO;
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switch (attr->group) {
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case KVM_DEV_ARM_VGIC_GRP_ADDR:
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r = kvm_vgic_addr(dev->kvm, attr, false);
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return (r == -ENODEV) ? -ENXIO : r;
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case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
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u32 __user *uaddr = (u32 __user *)(long)attr->addr;
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r = put_user(dev->kvm->arch.vgic.nr_spis +
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VGIC_NR_PRIVATE_IRQS, uaddr);
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break;
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}
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}
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return r;
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}
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static int vgic_create(struct kvm_device *dev, u32 type)
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{
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return kvm_vgic_create(dev->kvm, type);
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}
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static void vgic_destroy(struct kvm_device *dev)
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{
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kfree(dev);
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}
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int kvm_register_vgic_device(unsigned long type)
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{
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int ret = -ENODEV;
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switch (type) {
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case KVM_DEV_TYPE_ARM_VGIC_V2:
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ret = kvm_register_device_ops(&kvm_arm_vgic_v2_ops,
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KVM_DEV_TYPE_ARM_VGIC_V2);
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break;
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case KVM_DEV_TYPE_ARM_VGIC_V3:
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ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
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KVM_DEV_TYPE_ARM_VGIC_V3);
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if (ret)
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break;
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ret = kvm_vgic_register_its_device();
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break;
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}
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return ret;
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}
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int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,
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struct vgic_reg_attr *reg_attr)
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{
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int cpuid;
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cpuid = (attr->attr & KVM_DEV_ARM_VGIC_CPUID_MASK) >>
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KVM_DEV_ARM_VGIC_CPUID_SHIFT;
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if (cpuid >= atomic_read(&dev->kvm->online_vcpus))
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return -EINVAL;
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reg_attr->vcpu = kvm_get_vcpu(dev->kvm, cpuid);
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reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
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return 0;
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}
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/* unlocks vcpus from @vcpu_lock_idx and smaller */
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static void unlock_vcpus(struct kvm *kvm, int vcpu_lock_idx)
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{
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struct kvm_vcpu *tmp_vcpu;
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for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) {
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tmp_vcpu = kvm_get_vcpu(kvm, vcpu_lock_idx);
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mutex_unlock(&tmp_vcpu->mutex);
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}
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}
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void unlock_all_vcpus(struct kvm *kvm)
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{
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unlock_vcpus(kvm, atomic_read(&kvm->online_vcpus) - 1);
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}
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/* Returns true if all vcpus were locked, false otherwise */
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bool lock_all_vcpus(struct kvm *kvm)
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{
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struct kvm_vcpu *tmp_vcpu;
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unsigned long c;
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/*
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* Any time a vcpu is run, vcpu_load is called which tries to grab the
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* vcpu->mutex. By grabbing the vcpu->mutex of all VCPUs we ensure
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* that no other VCPUs are run and fiddle with the vgic state while we
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* access it.
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*/
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kvm_for_each_vcpu(c, tmp_vcpu, kvm) {
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if (!mutex_trylock(&tmp_vcpu->mutex)) {
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unlock_vcpus(kvm, c - 1);
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return false;
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}
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}
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return true;
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}
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/**
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* vgic_v2_attr_regs_access - allows user space to access VGIC v2 state
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*
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* @dev: kvm device handle
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* @attr: kvm device attribute
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* @is_write: true if userspace is writing a register
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*/
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static int vgic_v2_attr_regs_access(struct kvm_device *dev,
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struct kvm_device_attr *attr,
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bool is_write)
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{
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u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr;
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struct vgic_reg_attr reg_attr;
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gpa_t addr;
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struct kvm_vcpu *vcpu;
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int ret;
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u32 val;
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ret = vgic_v2_parse_attr(dev, attr, ®_attr);
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if (ret)
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return ret;
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vcpu = reg_attr.vcpu;
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addr = reg_attr.addr;
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if (is_write)
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if (get_user(val, uaddr))
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return -EFAULT;
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mutex_lock(&dev->kvm->lock);
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ret = vgic_init(dev->kvm);
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if (ret)
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goto out;
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if (!lock_all_vcpus(dev->kvm)) {
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ret = -EBUSY;
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goto out;
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}
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switch (attr->group) {
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case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
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ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, &val);
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break;
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case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
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ret = vgic_v2_dist_uaccess(vcpu, is_write, addr, &val);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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unlock_all_vcpus(dev->kvm);
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out:
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mutex_unlock(&dev->kvm->lock);
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if (!ret && !is_write)
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ret = put_user(val, uaddr);
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return ret;
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}
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static int vgic_v2_set_attr(struct kvm_device *dev,
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struct kvm_device_attr *attr)
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{
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switch (attr->group) {
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case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
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case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
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return vgic_v2_attr_regs_access(dev, attr, true);
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default:
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return vgic_set_common_attr(dev, attr);
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}
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}
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static int vgic_v2_get_attr(struct kvm_device *dev,
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struct kvm_device_attr *attr)
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{
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switch (attr->group) {
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case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
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case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
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return vgic_v2_attr_regs_access(dev, attr, false);
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default:
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return vgic_get_common_attr(dev, attr);
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}
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}
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static int vgic_v2_has_attr(struct kvm_device *dev,
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struct kvm_device_attr *attr)
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{
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switch (attr->group) {
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case KVM_DEV_ARM_VGIC_GRP_ADDR:
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switch (attr->attr) {
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case KVM_VGIC_V2_ADDR_TYPE_DIST:
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case KVM_VGIC_V2_ADDR_TYPE_CPU:
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return 0;
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}
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break;
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case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
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case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
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return vgic_v2_has_attr_regs(dev, attr);
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case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
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return 0;
|
|
case KVM_DEV_ARM_VGIC_GRP_CTRL:
|
|
switch (attr->attr) {
|
|
case KVM_DEV_ARM_VGIC_CTRL_INIT:
|
|
return 0;
|
|
}
|
|
}
|
|
return -ENXIO;
|
|
}
|
|
|
|
struct kvm_device_ops kvm_arm_vgic_v2_ops = {
|
|
.name = "kvm-arm-vgic-v2",
|
|
.create = vgic_create,
|
|
.destroy = vgic_destroy,
|
|
.set_attr = vgic_v2_set_attr,
|
|
.get_attr = vgic_v2_get_attr,
|
|
.has_attr = vgic_v2_has_attr,
|
|
};
|
|
|
|
int vgic_v3_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,
|
|
struct vgic_reg_attr *reg_attr)
|
|
{
|
|
unsigned long vgic_mpidr, mpidr_reg;
|
|
|
|
/*
|
|
* For KVM_DEV_ARM_VGIC_GRP_DIST_REGS group,
|
|
* attr might not hold MPIDR. Hence assume vcpu0.
|
|
*/
|
|
if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) {
|
|
vgic_mpidr = (attr->attr & KVM_DEV_ARM_VGIC_V3_MPIDR_MASK) >>
|
|
KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT;
|
|
|
|
mpidr_reg = VGIC_TO_MPIDR(vgic_mpidr);
|
|
reg_attr->vcpu = kvm_mpidr_to_vcpu(dev->kvm, mpidr_reg);
|
|
} else {
|
|
reg_attr->vcpu = kvm_get_vcpu(dev->kvm, 0);
|
|
}
|
|
|
|
if (!reg_attr->vcpu)
|
|
return -EINVAL;
|
|
|
|
reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* vgic_v3_attr_regs_access - allows user space to access VGIC v3 state
|
|
*
|
|
* @dev: kvm device handle
|
|
* @attr: kvm device attribute
|
|
* @is_write: true if userspace is writing a register
|
|
*/
|
|
static int vgic_v3_attr_regs_access(struct kvm_device *dev,
|
|
struct kvm_device_attr *attr,
|
|
bool is_write)
|
|
{
|
|
struct vgic_reg_attr reg_attr;
|
|
gpa_t addr;
|
|
struct kvm_vcpu *vcpu;
|
|
bool uaccess;
|
|
u32 val;
|
|
int ret;
|
|
|
|
ret = vgic_v3_parse_attr(dev, attr, ®_attr);
|
|
if (ret)
|
|
return ret;
|
|
|
|
vcpu = reg_attr.vcpu;
|
|
addr = reg_attr.addr;
|
|
|
|
switch (attr->group) {
|
|
case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
|
|
/* Sysregs uaccess is performed by the sysreg handling code */
|
|
uaccess = false;
|
|
break;
|
|
default:
|
|
uaccess = true;
|
|
}
|
|
|
|
if (uaccess && is_write) {
|
|
u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr;
|
|
if (get_user(val, uaddr))
|
|
return -EFAULT;
|
|
}
|
|
|
|
mutex_lock(&dev->kvm->lock);
|
|
|
|
if (unlikely(!vgic_initialized(dev->kvm))) {
|
|
ret = -EBUSY;
|
|
goto out;
|
|
}
|
|
|
|
if (!lock_all_vcpus(dev->kvm)) {
|
|
ret = -EBUSY;
|
|
goto out;
|
|
}
|
|
|
|
switch (attr->group) {
|
|
case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
|
|
ret = vgic_v3_dist_uaccess(vcpu, is_write, addr, &val);
|
|
break;
|
|
case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
|
|
ret = vgic_v3_redist_uaccess(vcpu, is_write, addr, &val);
|
|
break;
|
|
case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
|
|
ret = vgic_v3_cpu_sysregs_uaccess(vcpu, attr, is_write);
|
|
break;
|
|
case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
|
|
unsigned int info, intid;
|
|
|
|
info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
|
|
KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT;
|
|
if (info == VGIC_LEVEL_INFO_LINE_LEVEL) {
|
|
intid = attr->attr &
|
|
KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK;
|
|
ret = vgic_v3_line_level_info_uaccess(vcpu, is_write,
|
|
intid, &val);
|
|
} else {
|
|
ret = -EINVAL;
|
|
}
|
|
break;
|
|
}
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
unlock_all_vcpus(dev->kvm);
|
|
out:
|
|
mutex_unlock(&dev->kvm->lock);
|
|
|
|
if (!ret && uaccess && !is_write) {
|
|
u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr;
|
|
ret = put_user(val, uaddr);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int vgic_v3_set_attr(struct kvm_device *dev,
|
|
struct kvm_device_attr *attr)
|
|
{
|
|
switch (attr->group) {
|
|
case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO:
|
|
return vgic_v3_attr_regs_access(dev, attr, true);
|
|
default:
|
|
return vgic_set_common_attr(dev, attr);
|
|
}
|
|
}
|
|
|
|
static int vgic_v3_get_attr(struct kvm_device *dev,
|
|
struct kvm_device_attr *attr)
|
|
{
|
|
switch (attr->group) {
|
|
case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO:
|
|
return vgic_v3_attr_regs_access(dev, attr, false);
|
|
default:
|
|
return vgic_get_common_attr(dev, attr);
|
|
}
|
|
}
|
|
|
|
static int vgic_v3_has_attr(struct kvm_device *dev,
|
|
struct kvm_device_attr *attr)
|
|
{
|
|
switch (attr->group) {
|
|
case KVM_DEV_ARM_VGIC_GRP_ADDR:
|
|
switch (attr->attr) {
|
|
case KVM_VGIC_V3_ADDR_TYPE_DIST:
|
|
case KVM_VGIC_V3_ADDR_TYPE_REDIST:
|
|
case KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION:
|
|
return 0;
|
|
}
|
|
break;
|
|
case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
|
|
case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
|
|
return vgic_v3_has_attr_regs(dev, attr);
|
|
case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
|
|
return 0;
|
|
case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
|
|
if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
|
|
KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) ==
|
|
VGIC_LEVEL_INFO_LINE_LEVEL)
|
|
return 0;
|
|
break;
|
|
}
|
|
case KVM_DEV_ARM_VGIC_GRP_CTRL:
|
|
switch (attr->attr) {
|
|
case KVM_DEV_ARM_VGIC_CTRL_INIT:
|
|
return 0;
|
|
case KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES:
|
|
return 0;
|
|
}
|
|
}
|
|
return -ENXIO;
|
|
}
|
|
|
|
struct kvm_device_ops kvm_arm_vgic_v3_ops = {
|
|
.name = "kvm-arm-vgic-v3",
|
|
.create = vgic_create,
|
|
.destroy = vgic_destroy,
|
|
.set_attr = vgic_v3_set_attr,
|
|
.get_attr = vgic_v3_get_attr,
|
|
.has_attr = vgic_v3_has_attr,
|
|
};
|