linux/arch/nds32/mm
Vincent Chen efcc4ea872 nds32: Correct flush_dcache_page function
1. Disable local irq before d-cache write-back and invalidate.
   The cpu_dcache_wbinval_page function is composed of d-cache
write-back and invalidate. If the local irq is enabled when calling
cpu_dcache_wbinval_page, the content of d-cache is possibly updated
between write-back and invalidate. In this case, the updated data will
be dropped due to the following d-cache invalidation. Therefore, we
disable the local irq before calling cpu_dcache_wbinval_page.

2. Correct the data write-back for page aliasing case.
   Only the page whose (page->index << PAGE_SHIFT) is located at the
same page color as page_address(page) needs to execute data write-back
in flush_dcache_page function.

Signed-off-by: Vincent Chen <vincentc@andestech.com>
Reviewed-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
..
alignment.c nds32: Fix the unaligned access handler 2018-05-23 13:26:22 +08:00
cacheflush.c nds32: Correct flush_dcache_page function 2018-05-23 13:26:22 +08:00
extable.c nds32: MMU fault handling and page table management 2018-02-22 10:44:31 +08:00
fault.c nds32: MMU fault handling and page table management 2018-02-22 10:44:31 +08:00
highmem.c nds32: MMU initialization 2018-02-22 10:44:31 +08:00
init.c nds32: Fix the symbols undefined issue by exporting them. 2018-05-23 13:26:20 +08:00
ioremap.c nds32: Device specific operations 2018-02-22 10:44:32 +08:00
Makefile nds32: Build infrastructure 2018-02-22 10:44:35 +08:00
mm-nds32.c nds32: MMU initialization 2018-02-22 10:44:31 +08:00
mmap.c nds32: MMU fault handling and page table management 2018-02-22 10:44:31 +08:00
proc.c nds32: Cache and TLB routines 2018-02-22 10:44:32 +08:00
tlb.c nds32: Cache and TLB routines 2018-02-22 10:44:32 +08:00