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80f132d737
This patch increases the reg addresses for QSPI boot and QSPI rootfs for Stratix10 and Agilex to cater for the increased size of kernel Image. Signed-off-by: Joyce Ooi <joyce.ooi@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
191 lines
3.2 KiB
Plaintext
191 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright Altera Corporation (C) 2015. All rights reserved.
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*/
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#include "socfpga_stratix10.dtsi"
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/ {
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model = "SoCFPGA Stratix 10 SoCDK";
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aliases {
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serial0 = &uart0;
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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ethernet2 = &gmac2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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hps0 {
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label = "hps_led0";
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gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
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};
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hps1 {
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label = "hps_led1";
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gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
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};
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hps2 {
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label = "hps_led2";
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gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
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};
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};
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memory {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
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reg = <0 0 0 0>;
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};
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ref_033v: 033-v-ref {
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compatible = "regulator-fixed";
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regulator-name = "0.33V";
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regulator-min-microvolt = <330000>;
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regulator-max-microvolt = <330000>;
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};
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soc {
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clocks {
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osc1 {
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clock-frequency = <25000000>;
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};
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};
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eccmgr {
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sdmmca-ecc@ff8c8c00 {
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compatible = "altr,socfpga-s10-sdmmc-ecc",
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"altr,socfpga-sdmmc-ecc";
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reg = <0xff8c8c00 0x100>;
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altr,ecc-parent = <&mmc>;
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interrupts = <14 4>,
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<15 4>;
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};
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gmac0 {
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status = "okay";
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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max-frame-size = <9000>;
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <4>;
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txd0-skew-ps = <0>; /* -420ps */
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txd1-skew-ps = <0>; /* -420ps */
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txd2-skew-ps = <0>; /* -420ps */
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txd3-skew-ps = <0>; /* -420ps */
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rxd0-skew-ps = <420>; /* 0ps */
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rxd1-skew-ps = <420>; /* 0ps */
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rxd2-skew-ps = <420>; /* 0ps */
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rxd3-skew-ps = <420>; /* 0ps */
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txen-skew-ps = <0>; /* -420ps */
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txc-skew-ps = <900>; /* 0ps */
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rxdv-skew-ps = <420>; /* 0ps */
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rxc-skew-ps = <1680>; /* 780ps */
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};
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};
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};
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&mmc {
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status = "okay";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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broken-cd;
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bus-width = <4>;
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};
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&uart0 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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disable-over-current;
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};
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&watchdog0 {
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <100000>;
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i2c-sda-falling-time-ns = <890>; /* hcnt */
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i2c-sdl-falling-time-ns = <890>; /* lcnt */
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adc@14 {
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compatible = "lltc,ltc2497";
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reg = <0x14>;
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vref-supply = <&ref_033v>;
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};
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temp@4c {
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compatible = "maxim,max1619";
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reg = <0x4c>;
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};
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eeprom@51 {
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compatible = "atmel,24c32";
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reg = <0x51>;
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pagesize = <32>;
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};
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rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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};
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};
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&qspi {
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q00a";
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reg = <0>;
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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cdns,page-size = <256>;
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cdns,block-size = <16>;
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cdns,read-delay = <1>;
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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qspi_boot: partition@0 {
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label = "Boot and fpga data";
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reg = <0x0 0x03FE0000>;
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};
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qspi_rootfs: partition@3FE0000 {
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label = "Root Filesystem - JFFS2";
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reg = <0x03FE0000 0x0C020000>;
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};
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};
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};
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};
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