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From: Dave Hansen <dave.hansen@linux.intel.com> MPX is being removed from the kernel due to a lack of support in the toolchain going forward (gcc). This removes all the remaining (dead at this point) MPX handling code remaining in the tree. The only remaining code is the XSAVE support for MPX state which is currently needd for KVM to handle VMs which might use MPX. Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: x86@kernel.org Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
249 lines
6.9 KiB
C
249 lines
6.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Flexible mmap layout support
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*
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* Based on code by Ingo Molnar and Andi Kleen, copyrighted
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* as follows:
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*
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* Copyright 2003-2009 Red Hat Inc.
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* All Rights Reserved.
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* Copyright 2005 Andi Kleen, SUSE Labs.
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* Copyright 2007 Jiri Kosina, SUSE Labs.
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*/
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#include <linux/personality.h>
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#include <linux/mm.h>
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#include <linux/random.h>
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#include <linux/limits.h>
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#include <linux/sched/signal.h>
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#include <linux/sched/mm.h>
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#include <linux/compat.h>
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#include <asm/elf.h>
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#include "physaddr.h"
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struct va_alignment __read_mostly va_align = {
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.flags = -1,
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};
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unsigned long task_size_32bit(void)
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{
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return IA32_PAGE_OFFSET;
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}
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unsigned long task_size_64bit(int full_addr_space)
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{
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return full_addr_space ? TASK_SIZE_MAX : DEFAULT_MAP_WINDOW;
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}
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static unsigned long stack_maxrandom_size(unsigned long task_size)
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{
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unsigned long max = 0;
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if (current->flags & PF_RANDOMIZE) {
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max = (-1UL) & __STACK_RND_MASK(task_size == task_size_32bit());
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max <<= PAGE_SHIFT;
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}
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return max;
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}
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#ifdef CONFIG_COMPAT
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# define mmap32_rnd_bits mmap_rnd_compat_bits
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# define mmap64_rnd_bits mmap_rnd_bits
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#else
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# define mmap32_rnd_bits mmap_rnd_bits
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# define mmap64_rnd_bits mmap_rnd_bits
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#endif
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#define SIZE_128M (128 * 1024 * 1024UL)
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static int mmap_is_legacy(void)
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{
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if (current->personality & ADDR_COMPAT_LAYOUT)
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return 1;
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return sysctl_legacy_va_layout;
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}
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static unsigned long arch_rnd(unsigned int rndbits)
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{
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if (!(current->flags & PF_RANDOMIZE))
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return 0;
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return (get_random_long() & ((1UL << rndbits) - 1)) << PAGE_SHIFT;
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}
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unsigned long arch_mmap_rnd(void)
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{
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return arch_rnd(mmap_is_ia32() ? mmap32_rnd_bits : mmap64_rnd_bits);
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}
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static unsigned long mmap_base(unsigned long rnd, unsigned long task_size,
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struct rlimit *rlim_stack)
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{
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unsigned long gap = rlim_stack->rlim_cur;
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unsigned long pad = stack_maxrandom_size(task_size) + stack_guard_gap;
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unsigned long gap_min, gap_max;
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/* Values close to RLIM_INFINITY can overflow. */
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if (gap + pad > gap)
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gap += pad;
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/*
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* Top of mmap area (just below the process stack).
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* Leave an at least ~128 MB hole with possible stack randomization.
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*/
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gap_min = SIZE_128M;
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gap_max = (task_size / 6) * 5;
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if (gap < gap_min)
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gap = gap_min;
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else if (gap > gap_max)
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gap = gap_max;
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return PAGE_ALIGN(task_size - gap - rnd);
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}
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static unsigned long mmap_legacy_base(unsigned long rnd,
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unsigned long task_size)
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{
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return __TASK_UNMAPPED_BASE(task_size) + rnd;
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}
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/*
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* This function, called very early during the creation of a new
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* process VM image, sets up which VM layout function to use:
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*/
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static void arch_pick_mmap_base(unsigned long *base, unsigned long *legacy_base,
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unsigned long random_factor, unsigned long task_size,
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struct rlimit *rlim_stack)
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{
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*legacy_base = mmap_legacy_base(random_factor, task_size);
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if (mmap_is_legacy())
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*base = *legacy_base;
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else
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*base = mmap_base(random_factor, task_size, rlim_stack);
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}
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void arch_pick_mmap_layout(struct mm_struct *mm, struct rlimit *rlim_stack)
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{
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if (mmap_is_legacy())
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mm->get_unmapped_area = arch_get_unmapped_area;
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else
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mm->get_unmapped_area = arch_get_unmapped_area_topdown;
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arch_pick_mmap_base(&mm->mmap_base, &mm->mmap_legacy_base,
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arch_rnd(mmap64_rnd_bits), task_size_64bit(0),
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rlim_stack);
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#ifdef CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES
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/*
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* The mmap syscall mapping base decision depends solely on the
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* syscall type (64-bit or compat). This applies for 64bit
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* applications and 32bit applications. The 64bit syscall uses
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* mmap_base, the compat syscall uses mmap_compat_base.
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*/
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arch_pick_mmap_base(&mm->mmap_compat_base, &mm->mmap_compat_legacy_base,
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arch_rnd(mmap32_rnd_bits), task_size_32bit(),
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rlim_stack);
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#endif
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}
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unsigned long get_mmap_base(int is_legacy)
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{
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struct mm_struct *mm = current->mm;
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#ifdef CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES
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if (in_32bit_syscall()) {
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return is_legacy ? mm->mmap_compat_legacy_base
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: mm->mmap_compat_base;
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}
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#endif
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return is_legacy ? mm->mmap_legacy_base : mm->mmap_base;
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}
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const char *arch_vma_name(struct vm_area_struct *vma)
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{
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return NULL;
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}
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/**
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* mmap_address_hint_valid - Validate the address hint of mmap
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* @addr: Address hint
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* @len: Mapping length
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*
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* Check whether @addr and @addr + @len result in a valid mapping.
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*
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* On 32bit this only checks whether @addr + @len is <= TASK_SIZE.
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*
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* On 64bit with 5-level page tables another sanity check is required
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* because mappings requested by mmap(@addr, 0) which cross the 47-bit
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* virtual address boundary can cause the following theoretical issue:
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*
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* An application calls mmap(addr, 0), i.e. without MAP_FIXED, where @addr
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* is below the border of the 47-bit address space and @addr + @len is
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* above the border.
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*
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* With 4-level paging this request succeeds, but the resulting mapping
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* address will always be within the 47-bit virtual address space, because
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* the hint address does not result in a valid mapping and is
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* ignored. Hence applications which are not prepared to handle virtual
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* addresses above 47-bit work correctly.
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*
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* With 5-level paging this request would be granted and result in a
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* mapping which crosses the border of the 47-bit virtual address
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* space. If the application cannot handle addresses above 47-bit this
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* will lead to misbehaviour and hard to diagnose failures.
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*
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* Therefore ignore address hints which would result in a mapping crossing
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* the 47-bit virtual address boundary.
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*
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* Note, that in the same scenario with MAP_FIXED the behaviour is
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* different. The request with @addr < 47-bit and @addr + @len > 47-bit
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* fails on a 4-level paging machine but succeeds on a 5-level paging
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* machine. It is reasonable to expect that an application does not rely on
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* the failure of such a fixed mapping request, so the restriction is not
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* applied.
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*/
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bool mmap_address_hint_valid(unsigned long addr, unsigned long len)
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{
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if (TASK_SIZE - len < addr)
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return false;
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return (addr > DEFAULT_MAP_WINDOW) == (addr + len > DEFAULT_MAP_WINDOW);
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}
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/* Can we access it for direct reading/writing? Must be RAM: */
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int valid_phys_addr_range(phys_addr_t addr, size_t count)
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{
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return addr + count - 1 <= __pa(high_memory - 1);
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}
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/* Can we access it through mmap? Must be a valid physical address: */
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int valid_mmap_phys_addr_range(unsigned long pfn, size_t count)
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{
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phys_addr_t addr = (phys_addr_t)pfn << PAGE_SHIFT;
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return phys_addr_valid(addr + count - 1);
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}
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/*
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* Only allow root to set high MMIO mappings to PROT_NONE.
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* This prevents an unpriv. user to set them to PROT_NONE and invert
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* them, then pointing to valid memory for L1TF speculation.
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*
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* Note: for locked down kernels may want to disable the root override.
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*/
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bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
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{
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if (!boot_cpu_has_bug(X86_BUG_L1TF))
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return true;
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if (!__pte_needs_invert(pgprot_val(prot)))
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return true;
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/* If it's real memory always allow */
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if (pfn_valid(pfn))
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return true;
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if (pfn >= l1tf_pfn_limit() && !capable(CAP_SYS_ADMIN))
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return false;
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return true;
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}
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