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This patch explicitly initializes McBSP Transmit Configuration
Control Register (XCCR) and Receive Configuration Control
Register (RCCR) to their reset values. Reset values are 26 ns
of DX delay and Transmit DMA disabled for XCCR register;
receive full cycle mode enabled and Receive DMA disabled for
RCCR register.
This patch requires a counterpart in OMAP McBSP driver before
to apply it. The required changes in McBSP were sent and approved
in linux-omap mailing list and patch is going upstream
(commit
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| .. | ||
| atmel | ||
| au1x | ||
| blackfin | ||
| codecs | ||
| davinci | ||
| fsl | ||
| omap | ||
| pxa | ||
| s3c24xx | ||
| sh | ||
| Kconfig | ||
| Makefile | ||
| soc-core.c | ||
| soc-dapm.c | ||