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If the heartbeat module param is not specified we would get an error message watchdog: f1020300.watchdog: driver supplied timeout (4294967295) out of range watchdog: f1020300.watchdog: falling back to default timeout (171) This is because we were initialising heartbeat to -1. By removing the initialisation (thus letting the C run time initialise it to 0) we silence the warning message and the default timeout is still used. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20200313031312.1485-1-chris.packham@alliedtelesis.co.nz Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
688 lines
18 KiB
C
688 lines
18 KiB
C
/*
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* drivers/watchdog/orion_wdt.c
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*
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* Watchdog driver for Orion/Kirkwood processors
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*
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* Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
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#define ORION_RSTOUT_MASK_OFFSET 0x20108
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/* Internal registers can be configured at any 1 MiB aligned address */
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#define INTERNAL_REGS_MASK ~(SZ_1M - 1)
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/*
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* Watchdog timer block registers.
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*/
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#define TIMER_CTRL 0x0000
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#define TIMER1_FIXED_ENABLE_BIT BIT(12)
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#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
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#define TIMER1_ENABLE_BIT BIT(2)
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#define TIMER_A370_STATUS 0x0004
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#define WDT_A370_EXPIRED BIT(31)
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#define TIMER1_STATUS_BIT BIT(8)
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#define TIMER1_VAL_OFF 0x001c
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#define WDT_MAX_CYCLE_COUNT 0xffffffff
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#define WDT_A370_RATIO_MASK(v) ((v) << 16)
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#define WDT_A370_RATIO_SHIFT 5
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#define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static int heartbeat; /* module parameter (seconds) */
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struct orion_watchdog;
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struct orion_watchdog_data {
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int wdt_counter_offset;
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int wdt_enable_bit;
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int rstout_enable_bit;
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int rstout_mask_bit;
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int (*clock_init)(struct platform_device *,
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struct orion_watchdog *);
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int (*enabled)(struct orion_watchdog *);
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int (*start)(struct watchdog_device *);
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int (*stop)(struct watchdog_device *);
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};
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struct orion_watchdog {
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struct watchdog_device wdt;
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void __iomem *reg;
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void __iomem *rstout;
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void __iomem *rstout_mask;
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unsigned long clk_rate;
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struct clk *clk;
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const struct orion_watchdog_data *data;
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};
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static int orion_wdt_clock_init(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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int ret;
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dev->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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dev->clk_rate = clk_get_rate(dev->clk);
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return 0;
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}
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static int armada370_wdt_clock_init(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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int ret;
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dev->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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/* Setup watchdog input clock */
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atomic_io_modify(dev->reg + TIMER_CTRL,
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WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
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WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
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dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
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return 0;
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}
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static int armada375_wdt_clock_init(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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int ret;
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dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
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if (!IS_ERR(dev->clk)) {
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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atomic_io_modify(dev->reg + TIMER_CTRL,
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WDT_AXP_FIXED_ENABLE_BIT,
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WDT_AXP_FIXED_ENABLE_BIT);
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dev->clk_rate = clk_get_rate(dev->clk);
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return 0;
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}
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/* Mandatory fallback for proper devicetree backward compatibility */
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dev->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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atomic_io_modify(dev->reg + TIMER_CTRL,
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WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
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WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
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dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
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return 0;
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}
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static int armadaxp_wdt_clock_init(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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int ret;
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u32 val;
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dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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/* Fix the wdt and timer1 clock freqency to 25MHz */
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val = WDT_AXP_FIXED_ENABLE_BIT | TIMER1_FIXED_ENABLE_BIT;
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atomic_io_modify(dev->reg + TIMER_CTRL, val, val);
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dev->clk_rate = clk_get_rate(dev->clk);
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return 0;
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}
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static int orion_wdt_ping(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* Reload watchdog duration */
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writel(dev->clk_rate * wdt_dev->timeout,
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dev->reg + dev->data->wdt_counter_offset);
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if (dev->wdt.info->options & WDIOF_PRETIMEOUT)
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writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout),
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dev->reg + TIMER1_VAL_OFF);
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return 0;
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}
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static int armada375_start(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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u32 reg;
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/* Set watchdog duration */
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writel(dev->clk_rate * wdt_dev->timeout,
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dev->reg + dev->data->wdt_counter_offset);
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if (dev->wdt.info->options & WDIOF_PRETIMEOUT)
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writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout),
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dev->reg + TIMER1_VAL_OFF);
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/* Clear the watchdog expiration bit */
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atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
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/* Enable watchdog timer */
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reg = dev->data->wdt_enable_bit;
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if (dev->wdt.info->options & WDIOF_PRETIMEOUT)
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reg |= TIMER1_ENABLE_BIT;
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atomic_io_modify(dev->reg + TIMER_CTRL, reg, reg);
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/* Enable reset on watchdog */
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reg = readl(dev->rstout);
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reg |= dev->data->rstout_enable_bit;
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writel(reg, dev->rstout);
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atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, 0);
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return 0;
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}
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static int armada370_start(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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u32 reg;
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/* Set watchdog duration */
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writel(dev->clk_rate * wdt_dev->timeout,
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dev->reg + dev->data->wdt_counter_offset);
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/* Clear the watchdog expiration bit */
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atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
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/* Enable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
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dev->data->wdt_enable_bit);
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/* Enable reset on watchdog */
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reg = readl(dev->rstout);
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reg |= dev->data->rstout_enable_bit;
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writel(reg, dev->rstout);
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return 0;
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}
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static int orion_start(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* Set watchdog duration */
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writel(dev->clk_rate * wdt_dev->timeout,
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dev->reg + dev->data->wdt_counter_offset);
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/* Enable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
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dev->data->wdt_enable_bit);
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/* Enable reset on watchdog */
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atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
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dev->data->rstout_enable_bit);
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return 0;
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}
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static int orion_wdt_start(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* There are some per-SoC quirks to handle */
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return dev->data->start(wdt_dev);
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}
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static int orion_stop(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* Disable reset on watchdog */
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atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0);
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/* Disable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
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return 0;
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}
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static int armada375_stop(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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u32 reg, mask;
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/* Disable reset on watchdog */
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atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit,
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dev->data->rstout_mask_bit);
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reg = readl(dev->rstout);
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reg &= ~dev->data->rstout_enable_bit;
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writel(reg, dev->rstout);
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/* Disable watchdog timer */
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mask = dev->data->wdt_enable_bit;
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if (wdt_dev->info->options & WDIOF_PRETIMEOUT)
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mask |= TIMER1_ENABLE_BIT;
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atomic_io_modify(dev->reg + TIMER_CTRL, mask, 0);
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return 0;
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}
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static int armada370_stop(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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u32 reg;
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/* Disable reset on watchdog */
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reg = readl(dev->rstout);
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reg &= ~dev->data->rstout_enable_bit;
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writel(reg, dev->rstout);
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/* Disable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
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return 0;
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}
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static int orion_wdt_stop(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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return dev->data->stop(wdt_dev);
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}
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static int orion_enabled(struct orion_watchdog *dev)
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{
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bool enabled, running;
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enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
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running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
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return enabled && running;
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}
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static int armada375_enabled(struct orion_watchdog *dev)
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{
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bool masked, enabled, running;
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masked = readl(dev->rstout_mask) & dev->data->rstout_mask_bit;
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enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
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running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
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return !masked && enabled && running;
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}
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static int orion_wdt_enabled(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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return dev->data->enabled(dev);
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}
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static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
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}
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static struct watchdog_info orion_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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.identity = "Orion Watchdog",
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};
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static const struct watchdog_ops orion_wdt_ops = {
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.owner = THIS_MODULE,
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.start = orion_wdt_start,
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.stop = orion_wdt_stop,
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.ping = orion_wdt_ping,
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.get_timeleft = orion_wdt_get_timeleft,
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};
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static irqreturn_t orion_wdt_irq(int irq, void *devid)
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{
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panic("Watchdog Timeout");
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return IRQ_HANDLED;
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}
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static irqreturn_t orion_wdt_pre_irq(int irq, void *devid)
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{
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struct orion_watchdog *dev = devid;
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atomic_io_modify(dev->reg + TIMER_A370_STATUS,
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TIMER1_STATUS_BIT, 0);
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watchdog_notify_pretimeout(&dev->wdt);
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return IRQ_HANDLED;
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}
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/*
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* The original devicetree binding for this driver specified only
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* one memory resource, so in order to keep DT backwards compatibility
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* we try to fallback to a hardcoded register address, if the resource
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* is missing from the devicetree.
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*/
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static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev,
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phys_addr_t internal_regs)
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{
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struct resource *res;
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phys_addr_t rstout;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (res)
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return devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;
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WARN(1, FW_BUG "falling back to hardcoded RSTOUT reg %pa\n", &rstout);
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return devm_ioremap(&pdev->dev, rstout, 0x4);
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}
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static const struct orion_watchdog_data orion_data = {
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.rstout_enable_bit = BIT(1),
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.wdt_enable_bit = BIT(4),
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.wdt_counter_offset = 0x24,
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.clock_init = orion_wdt_clock_init,
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.enabled = orion_enabled,
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.start = orion_start,
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.stop = orion_stop,
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};
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static const struct orion_watchdog_data armada370_data = {
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.rstout_enable_bit = BIT(8),
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.wdt_enable_bit = BIT(8),
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.wdt_counter_offset = 0x34,
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.clock_init = armada370_wdt_clock_init,
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.enabled = orion_enabled,
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.start = armada370_start,
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.stop = armada370_stop,
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};
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static const struct orion_watchdog_data armadaxp_data = {
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.rstout_enable_bit = BIT(8),
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.wdt_enable_bit = BIT(8),
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.wdt_counter_offset = 0x34,
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.clock_init = armadaxp_wdt_clock_init,
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.enabled = orion_enabled,
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.start = armada370_start,
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.stop = armada370_stop,
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};
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static const struct orion_watchdog_data armada375_data = {
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.rstout_enable_bit = BIT(8),
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.rstout_mask_bit = BIT(10),
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.wdt_enable_bit = BIT(8),
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.wdt_counter_offset = 0x34,
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.clock_init = armada375_wdt_clock_init,
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.enabled = armada375_enabled,
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.start = armada375_start,
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.stop = armada375_stop,
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};
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static const struct orion_watchdog_data armada380_data = {
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.rstout_enable_bit = BIT(8),
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.rstout_mask_bit = BIT(10),
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.wdt_enable_bit = BIT(8),
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.wdt_counter_offset = 0x34,
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.clock_init = armadaxp_wdt_clock_init,
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.enabled = armada375_enabled,
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.start = armada375_start,
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.stop = armada375_stop,
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};
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static const struct of_device_id orion_wdt_of_match_table[] = {
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{
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.compatible = "marvell,orion-wdt",
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.data = &orion_data,
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},
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|
{
|
|
.compatible = "marvell,armada-370-wdt",
|
|
.data = &armada370_data,
|
|
},
|
|
{
|
|
.compatible = "marvell,armada-xp-wdt",
|
|
.data = &armadaxp_data,
|
|
},
|
|
{
|
|
.compatible = "marvell,armada-375-wdt",
|
|
.data = &armada375_data,
|
|
},
|
|
{
|
|
.compatible = "marvell,armada-380-wdt",
|
|
.data = &armada380_data,
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
|
|
|
|
static int orion_wdt_get_regs(struct platform_device *pdev,
|
|
struct orion_watchdog *dev)
|
|
{
|
|
struct device_node *node = pdev->dev.of_node;
|
|
struct resource *res;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
return -ENODEV;
|
|
dev->reg = devm_ioremap(&pdev->dev, res->start,
|
|
resource_size(res));
|
|
if (!dev->reg)
|
|
return -ENOMEM;
|
|
|
|
/* Each supported compatible has some RSTOUT register quirk */
|
|
if (of_device_is_compatible(node, "marvell,orion-wdt")) {
|
|
|
|
dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
|
|
INTERNAL_REGS_MASK);
|
|
if (!dev->rstout)
|
|
return -ENODEV;
|
|
|
|
} else if (of_device_is_compatible(node, "marvell,armada-370-wdt") ||
|
|
of_device_is_compatible(node, "marvell,armada-xp-wdt")) {
|
|
|
|
/* Dedicated RSTOUT register, can be requested. */
|
|
dev->rstout = devm_platform_ioremap_resource(pdev, 1);
|
|
if (IS_ERR(dev->rstout))
|
|
return PTR_ERR(dev->rstout);
|
|
|
|
} else if (of_device_is_compatible(node, "marvell,armada-375-wdt") ||
|
|
of_device_is_compatible(node, "marvell,armada-380-wdt")) {
|
|
|
|
/* Dedicated RSTOUT register, can be requested. */
|
|
dev->rstout = devm_platform_ioremap_resource(pdev, 1);
|
|
if (IS_ERR(dev->rstout))
|
|
return PTR_ERR(dev->rstout);
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
|
|
if (!res)
|
|
return -ENODEV;
|
|
dev->rstout_mask = devm_ioremap(&pdev->dev, res->start,
|
|
resource_size(res));
|
|
if (!dev->rstout_mask)
|
|
return -ENOMEM;
|
|
|
|
} else {
|
|
return -ENODEV;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int orion_wdt_probe(struct platform_device *pdev)
|
|
{
|
|
struct orion_watchdog *dev;
|
|
const struct of_device_id *match;
|
|
unsigned int wdt_max_duration; /* (seconds) */
|
|
int ret, irq;
|
|
|
|
dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),
|
|
GFP_KERNEL);
|
|
if (!dev)
|
|
return -ENOMEM;
|
|
|
|
match = of_match_device(orion_wdt_of_match_table, &pdev->dev);
|
|
if (!match)
|
|
/* Default legacy match */
|
|
match = &orion_wdt_of_match_table[0];
|
|
|
|
dev->wdt.info = &orion_wdt_info;
|
|
dev->wdt.ops = &orion_wdt_ops;
|
|
dev->wdt.min_timeout = 1;
|
|
dev->data = match->data;
|
|
|
|
ret = orion_wdt_get_regs(pdev, dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = dev->data->clock_init(pdev, dev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "cannot initialize clock\n");
|
|
return ret;
|
|
}
|
|
|
|
wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate;
|
|
|
|
dev->wdt.timeout = wdt_max_duration;
|
|
dev->wdt.max_timeout = wdt_max_duration;
|
|
dev->wdt.parent = &pdev->dev;
|
|
watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev);
|
|
|
|
platform_set_drvdata(pdev, &dev->wdt);
|
|
watchdog_set_drvdata(&dev->wdt, dev);
|
|
|
|
/*
|
|
* Let's make sure the watchdog is fully stopped, unless it's
|
|
* explicitly enabled. This may be the case if the module was
|
|
* removed and re-inserted, or if the bootloader explicitly
|
|
* set a running watchdog before booting the kernel.
|
|
*/
|
|
if (!orion_wdt_enabled(&dev->wdt))
|
|
orion_wdt_stop(&dev->wdt);
|
|
else
|
|
set_bit(WDOG_HW_RUNNING, &dev->wdt.status);
|
|
|
|
/* Request the IRQ only after the watchdog is disabled */
|
|
irq = platform_get_irq_optional(pdev, 0);
|
|
if (irq > 0) {
|
|
/*
|
|
* Not all supported platforms specify an interrupt for the
|
|
* watchdog, so let's make it optional.
|
|
*/
|
|
ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
|
|
pdev->name, dev);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "failed to request IRQ\n");
|
|
goto disable_clk;
|
|
}
|
|
}
|
|
|
|
/* Optional 2nd interrupt for pretimeout */
|
|
irq = platform_get_irq_optional(pdev, 1);
|
|
if (irq > 0) {
|
|
orion_wdt_info.options |= WDIOF_PRETIMEOUT;
|
|
ret = devm_request_irq(&pdev->dev, irq, orion_wdt_pre_irq,
|
|
0, pdev->name, dev);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "failed to request IRQ\n");
|
|
goto disable_clk;
|
|
}
|
|
}
|
|
|
|
|
|
watchdog_set_nowayout(&dev->wdt, nowayout);
|
|
ret = watchdog_register_device(&dev->wdt);
|
|
if (ret)
|
|
goto disable_clk;
|
|
|
|
pr_info("Initial timeout %d sec%s\n",
|
|
dev->wdt.timeout, nowayout ? ", nowayout" : "");
|
|
return 0;
|
|
|
|
disable_clk:
|
|
clk_disable_unprepare(dev->clk);
|
|
clk_put(dev->clk);
|
|
return ret;
|
|
}
|
|
|
|
static int orion_wdt_remove(struct platform_device *pdev)
|
|
{
|
|
struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
|
|
struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
|
|
|
|
watchdog_unregister_device(wdt_dev);
|
|
clk_disable_unprepare(dev->clk);
|
|
clk_put(dev->clk);
|
|
return 0;
|
|
}
|
|
|
|
static void orion_wdt_shutdown(struct platform_device *pdev)
|
|
{
|
|
struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
|
|
orion_wdt_stop(wdt_dev);
|
|
}
|
|
|
|
static struct platform_driver orion_wdt_driver = {
|
|
.probe = orion_wdt_probe,
|
|
.remove = orion_wdt_remove,
|
|
.shutdown = orion_wdt_shutdown,
|
|
.driver = {
|
|
.name = "orion_wdt",
|
|
.of_match_table = orion_wdt_of_match_table,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(orion_wdt_driver);
|
|
|
|
MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
|
|
MODULE_DESCRIPTION("Orion Processor Watchdog");
|
|
|
|
module_param(heartbeat, int, 0);
|
|
MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
|
|
|
|
module_param(nowayout, bool, 0);
|
|
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
|
|
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:orion_wdt");
|