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a28b2bfc09
The cppc_cpudata per-cpu storage was inefficient (1) additional to causing functional issues (2) when CPUs are hotplugged out, due to per-cpu data being improperly initialised. (1) The amount of information needed for CPPC performance control in its cpufreq driver depends on the domain (PSD) coordination type: ANY: One set of CPPC control and capability data (e.g desired performance, highest/lowest performance, etc) applies to all CPUs in the domain. ALL: Same as ANY. To be noted that this type is not currently supported. When supported, information about which CPUs belong to a domain is needed in order for frequency change requests to be sent to each of them. HW: It's necessary to store CPPC control and capability information for all the CPUs. HW will then coordinate the performance state based on their limitations and requests. NONE: Same as HW. No HW coordination is expected. Despite this, the previous initialisation code would indiscriminately allocate memory for all CPUs (all_cpu_data) and unnecessarily duplicate performance capabilities and the domain sharing mask and type for each possible CPU. (2) With the current per-cpu structure, when having ANY coordination, the cppc_cpudata cpu information is not initialised (will remain 0) for all CPUs in a policy, other than policy->cpu. When policy->cpu is hotplugged out, the driver will incorrectly use the uninitialised (0) value of the other CPUs when making frequency changes. Additionally, the previous values stored in the perf_ctrls.desired_perf will be lost when policy->cpu changes. Therefore replace the array of per cpu data with a list. The memory for each structure is allocated at policy init, where a single structure can be allocated per policy, not per cpu. In order to accommodate the struct list_head node in the cppc_cpudata structure, the now unused cpu and cur_policy variables are removed. For example, on a arm64 Juno platform with 6 CPUs: (0, 1, 2, 3) in PSD1, (4, 5) in PSD2 - ANY coordination, the memory allocation comparison shows: Before patch: - ANY coordination: total slack req alloc/free caller 0 0 0 0/1 _kernel_size_le_hi32+0x0xffff800008ff7810 0 0 0 0/6 _kernel_size_le_hi32+0x0xffff800008ff7808 128 80 48 1/0 _kernel_size_le_hi32+0x0xffff800008ffc070 768 0 768 6/0 _kernel_size_le_hi32+0x0xffff800008ffc0e4 After patch: - ANY coordination: total slack req alloc/free caller 256 0 256 2/0 _kernel_size_le_hi32+0x0xffff800008fed410 0 0 0 0/2 _kernel_size_le_hi32+0x0xffff800008fed274 Additional notes: - A pointer to the policy's cppc_cpudata is stored in policy->driver_data - Driver registration is skipped if _CPC entries are not present. Signed-off-by: Ionela Voinescu <ionela.voinescu@arm.com> Tested-by: Mian Yousaf Kaukab <ykaukab@suse.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
559 lines
14 KiB
C
559 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* CPPC (Collaborative Processor Performance Control) driver for
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* interfacing with the CPUfreq layer and governors. See
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* cppc_acpi.c for CPPC specific methods.
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*
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* (C) Copyright 2014, 2015 Linaro Ltd.
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* Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
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*/
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#define pr_fmt(fmt) "CPPC Cpufreq:" fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/cpu.h>
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#include <linux/cpufreq.h>
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#include <linux/dmi.h>
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#include <linux/time.h>
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#include <linux/vmalloc.h>
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#include <asm/unaligned.h>
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#include <acpi/cppc_acpi.h>
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/* Minimum struct length needed for the DMI processor entry we want */
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#define DMI_ENTRY_PROCESSOR_MIN_LENGTH 48
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/* Offset in the DMI processor structure for the max frequency */
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#define DMI_PROCESSOR_MAX_SPEED 0x14
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/*
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* This list contains information parsed from per CPU ACPI _CPC and _PSD
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* structures: e.g. the highest and lowest supported performance, capabilities,
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* desired performance, level requested etc. Depending on the share_type, not
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* all CPUs will have an entry in the list.
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*/
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static LIST_HEAD(cpu_data_list);
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static bool boost_supported;
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struct cppc_workaround_oem_info {
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char oem_id[ACPI_OEM_ID_SIZE + 1];
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char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
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u32 oem_revision;
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};
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static struct cppc_workaround_oem_info wa_info[] = {
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{
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.oem_id = "HISI ",
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.oem_table_id = "HIP07 ",
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.oem_revision = 0,
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}, {
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.oem_id = "HISI ",
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.oem_table_id = "HIP08 ",
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.oem_revision = 0,
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}
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};
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/* Callback function used to retrieve the max frequency from DMI */
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static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private)
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{
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const u8 *dmi_data = (const u8 *)dm;
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u16 *mhz = (u16 *)private;
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if (dm->type == DMI_ENTRY_PROCESSOR &&
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dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) {
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u16 val = (u16)get_unaligned((const u16 *)
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(dmi_data + DMI_PROCESSOR_MAX_SPEED));
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*mhz = val > *mhz ? val : *mhz;
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}
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}
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/* Look up the max frequency in DMI */
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static u64 cppc_get_dmi_max_khz(void)
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{
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u16 mhz = 0;
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dmi_walk(cppc_find_dmi_mhz, &mhz);
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/*
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* Real stupid fallback value, just in case there is no
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* actual value set.
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*/
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mhz = mhz ? mhz : 1;
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return (1000 * mhz);
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}
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/*
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* If CPPC lowest_freq and nominal_freq registers are exposed then we can
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* use them to convert perf to freq and vice versa
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*
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* If the perf/freq point lies between Nominal and Lowest, we can treat
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* (Low perf, Low freq) and (Nom Perf, Nom freq) as 2D co-ordinates of a line
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* and extrapolate the rest
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* For perf/freq > Nominal, we use the ratio perf:freq at Nominal for conversion
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*/
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static unsigned int cppc_cpufreq_perf_to_khz(struct cppc_cpudata *cpu_data,
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unsigned int perf)
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{
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struct cppc_perf_caps *caps = &cpu_data->perf_caps;
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static u64 max_khz;
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u64 mul, div;
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if (caps->lowest_freq && caps->nominal_freq) {
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if (perf >= caps->nominal_perf) {
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mul = caps->nominal_freq;
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div = caps->nominal_perf;
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} else {
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mul = caps->nominal_freq - caps->lowest_freq;
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div = caps->nominal_perf - caps->lowest_perf;
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}
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} else {
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if (!max_khz)
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max_khz = cppc_get_dmi_max_khz();
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mul = max_khz;
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div = caps->highest_perf;
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}
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return (u64)perf * mul / div;
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}
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static unsigned int cppc_cpufreq_khz_to_perf(struct cppc_cpudata *cpu_data,
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unsigned int freq)
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{
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struct cppc_perf_caps *caps = &cpu_data->perf_caps;
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static u64 max_khz;
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u64 mul, div;
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if (caps->lowest_freq && caps->nominal_freq) {
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if (freq >= caps->nominal_freq) {
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mul = caps->nominal_perf;
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div = caps->nominal_freq;
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} else {
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mul = caps->lowest_perf;
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div = caps->lowest_freq;
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}
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} else {
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if (!max_khz)
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max_khz = cppc_get_dmi_max_khz();
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mul = caps->highest_perf;
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div = max_khz;
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}
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return (u64)freq * mul / div;
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}
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static int cppc_cpufreq_set_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct cppc_cpudata *cpu_data = policy->driver_data;
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unsigned int cpu = policy->cpu;
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struct cpufreq_freqs freqs;
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u32 desired_perf;
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int ret = 0;
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desired_perf = cppc_cpufreq_khz_to_perf(cpu_data, target_freq);
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/* Return if it is exactly the same perf */
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if (desired_perf == cpu_data->perf_ctrls.desired_perf)
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return ret;
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cpu_data->perf_ctrls.desired_perf = desired_perf;
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freqs.old = policy->cur;
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freqs.new = target_freq;
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cpufreq_freq_transition_begin(policy, &freqs);
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ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
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cpufreq_freq_transition_end(policy, &freqs, ret != 0);
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if (ret)
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pr_debug("Failed to set target on CPU:%d. ret:%d\n",
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cpu, ret);
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return ret;
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}
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static int cppc_verify_policy(struct cpufreq_policy_data *policy)
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{
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cpufreq_verify_within_cpu_limits(policy);
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return 0;
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}
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static void cppc_cpufreq_stop_cpu(struct cpufreq_policy *policy)
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{
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struct cppc_cpudata *cpu_data = policy->driver_data;
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struct cppc_perf_caps *caps = &cpu_data->perf_caps;
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unsigned int cpu = policy->cpu;
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int ret;
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cpu_data->perf_ctrls.desired_perf = caps->lowest_perf;
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ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
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if (ret)
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pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
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caps->lowest_perf, cpu, ret);
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/* Remove CPU node from list and free driver data for policy */
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free_cpumask_var(cpu_data->shared_cpu_map);
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list_del(&cpu_data->node);
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kfree(policy->driver_data);
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policy->driver_data = NULL;
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}
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/*
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* The PCC subspace describes the rate at which platform can accept commands
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* on the shared PCC channel (including READs which do not count towards freq
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* transition requests), so ideally we need to use the PCC values as a fallback
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* if we don't have a platform specific transition_delay_us
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*/
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#ifdef CONFIG_ARM64
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#include <asm/cputype.h>
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static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
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{
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unsigned long implementor = read_cpuid_implementor();
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unsigned long part_num = read_cpuid_part_number();
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unsigned int delay_us = 0;
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switch (implementor) {
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case ARM_CPU_IMP_QCOM:
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switch (part_num) {
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case QCOM_CPU_PART_FALKOR_V1:
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case QCOM_CPU_PART_FALKOR:
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delay_us = 10000;
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break;
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default:
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delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
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break;
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}
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break;
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default:
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delay_us = cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
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break;
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}
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return delay_us;
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}
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#else
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static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu)
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{
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return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;
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}
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#endif
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static struct cppc_cpudata *cppc_cpufreq_get_cpu_data(unsigned int cpu)
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{
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struct cppc_cpudata *cpu_data;
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int ret;
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cpu_data = kzalloc(sizeof(struct cppc_cpudata), GFP_KERNEL);
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if (!cpu_data)
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goto out;
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if (!zalloc_cpumask_var(&cpu_data->shared_cpu_map, GFP_KERNEL))
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goto free_cpu;
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ret = acpi_get_psd_map(cpu, cpu_data);
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if (ret) {
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pr_debug("Err parsing CPU%d PSD data: ret:%d\n", cpu, ret);
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goto free_mask;
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}
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ret = cppc_get_perf_caps(cpu, &cpu_data->perf_caps);
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if (ret) {
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pr_debug("Err reading CPU%d perf caps: ret:%d\n", cpu, ret);
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goto free_mask;
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}
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/* Convert the lowest and nominal freq from MHz to KHz */
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cpu_data->perf_caps.lowest_freq *= 1000;
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cpu_data->perf_caps.nominal_freq *= 1000;
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list_add(&cpu_data->node, &cpu_data_list);
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return cpu_data;
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free_mask:
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free_cpumask_var(cpu_data->shared_cpu_map);
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free_cpu:
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kfree(cpu_data);
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out:
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return NULL;
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}
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static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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unsigned int cpu = policy->cpu;
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struct cppc_cpudata *cpu_data;
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struct cppc_perf_caps *caps;
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int ret;
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cpu_data = cppc_cpufreq_get_cpu_data(cpu);
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if (!cpu_data) {
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pr_err("Error in acquiring _CPC/_PSD data for CPU%d.\n", cpu);
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return -ENODEV;
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}
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caps = &cpu_data->perf_caps;
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policy->driver_data = cpu_data;
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/*
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* Set min to lowest nonlinear perf to avoid any efficiency penalty (see
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* Section 8.4.7.1.1.5 of ACPI 6.1 spec)
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*/
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policy->min = cppc_cpufreq_perf_to_khz(cpu_data,
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caps->lowest_nonlinear_perf);
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policy->max = cppc_cpufreq_perf_to_khz(cpu_data,
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caps->nominal_perf);
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/*
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* Set cpuinfo.min_freq to Lowest to make the full range of performance
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* available if userspace wants to use any perf between lowest & lowest
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* nonlinear perf
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*/
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policy->cpuinfo.min_freq = cppc_cpufreq_perf_to_khz(cpu_data,
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caps->lowest_perf);
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policy->cpuinfo.max_freq = cppc_cpufreq_perf_to_khz(cpu_data,
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caps->nominal_perf);
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policy->transition_delay_us = cppc_cpufreq_get_transition_delay_us(cpu);
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policy->shared_type = cpu_data->shared_type;
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switch (policy->shared_type) {
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case CPUFREQ_SHARED_TYPE_HW:
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case CPUFREQ_SHARED_TYPE_NONE:
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/* Nothing to be done - we'll have a policy for each CPU */
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break;
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case CPUFREQ_SHARED_TYPE_ANY:
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/*
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* All CPUs in the domain will share a policy and all cpufreq
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* operations will use a single cppc_cpudata structure stored
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* in policy->driver_data.
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*/
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cpumask_copy(policy->cpus, cpu_data->shared_cpu_map);
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break;
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default:
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pr_debug("Unsupported CPU co-ord type: %d\n",
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policy->shared_type);
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return -EFAULT;
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}
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/*
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* If 'highest_perf' is greater than 'nominal_perf', we assume CPU Boost
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* is supported.
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*/
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if (caps->highest_perf > caps->nominal_perf)
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boost_supported = true;
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/* Set policy->cur to max now. The governors will adjust later. */
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policy->cur = cppc_cpufreq_perf_to_khz(cpu_data, caps->highest_perf);
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cpu_data->perf_ctrls.desired_perf = caps->highest_perf;
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ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls);
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if (ret)
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pr_debug("Err setting perf value:%d on CPU:%d. ret:%d\n",
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caps->highest_perf, cpu, ret);
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return ret;
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}
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static inline u64 get_delta(u64 t1, u64 t0)
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{
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if (t1 > t0 || t0 > ~(u32)0)
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return t1 - t0;
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return (u32)t1 - (u32)t0;
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}
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static int cppc_get_rate_from_fbctrs(struct cppc_cpudata *cpu_data,
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struct cppc_perf_fb_ctrs fb_ctrs_t0,
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struct cppc_perf_fb_ctrs fb_ctrs_t1)
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{
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u64 delta_reference, delta_delivered;
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u64 reference_perf, delivered_perf;
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reference_perf = fb_ctrs_t0.reference_perf;
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delta_reference = get_delta(fb_ctrs_t1.reference,
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fb_ctrs_t0.reference);
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delta_delivered = get_delta(fb_ctrs_t1.delivered,
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fb_ctrs_t0.delivered);
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/* Check to avoid divide-by zero */
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if (delta_reference || delta_delivered)
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delivered_perf = (reference_perf * delta_delivered) /
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delta_reference;
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else
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delivered_perf = cpu_data->perf_ctrls.desired_perf;
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return cppc_cpufreq_perf_to_khz(cpu_data, delivered_perf);
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}
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static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)
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{
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struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};
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struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
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struct cppc_cpudata *cpu_data = policy->driver_data;
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int ret;
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cpufreq_cpu_put(policy);
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ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t0);
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if (ret)
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return ret;
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udelay(2); /* 2usec delay between sampling */
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ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t1);
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if (ret)
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return ret;
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return cppc_get_rate_from_fbctrs(cpu_data, fb_ctrs_t0, fb_ctrs_t1);
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}
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static int cppc_cpufreq_set_boost(struct cpufreq_policy *policy, int state)
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{
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struct cppc_cpudata *cpu_data = policy->driver_data;
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struct cppc_perf_caps *caps = &cpu_data->perf_caps;
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int ret;
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if (!boost_supported) {
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pr_err("BOOST not supported by CPU or firmware\n");
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return -EINVAL;
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}
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if (state)
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policy->max = cppc_cpufreq_perf_to_khz(cpu_data,
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caps->highest_perf);
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else
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policy->max = cppc_cpufreq_perf_to_khz(cpu_data,
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caps->nominal_perf);
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policy->cpuinfo.max_freq = policy->max;
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ret = freq_qos_update_request(policy->max_freq_req, policy->max);
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if (ret < 0)
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return ret;
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return 0;
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}
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static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
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{
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struct cppc_cpudata *cpu_data = policy->driver_data;
|
|
|
|
return cpufreq_show_cpus(cpu_data->shared_cpu_map, buf);
|
|
}
|
|
cpufreq_freq_attr_ro(freqdomain_cpus);
|
|
|
|
static struct freq_attr *cppc_cpufreq_attr[] = {
|
|
&freqdomain_cpus,
|
|
NULL,
|
|
};
|
|
|
|
static struct cpufreq_driver cppc_cpufreq_driver = {
|
|
.flags = CPUFREQ_CONST_LOOPS,
|
|
.verify = cppc_verify_policy,
|
|
.target = cppc_cpufreq_set_target,
|
|
.get = cppc_cpufreq_get_rate,
|
|
.init = cppc_cpufreq_cpu_init,
|
|
.stop_cpu = cppc_cpufreq_stop_cpu,
|
|
.set_boost = cppc_cpufreq_set_boost,
|
|
.attr = cppc_cpufreq_attr,
|
|
.name = "cppc_cpufreq",
|
|
};
|
|
|
|
/*
|
|
* HISI platform does not support delivered performance counter and
|
|
* reference performance counter. It can calculate the performance using the
|
|
* platform specific mechanism. We reuse the desired performance register to
|
|
* store the real performance calculated by the platform.
|
|
*/
|
|
static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu)
|
|
{
|
|
struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
|
|
struct cppc_cpudata *cpu_data = policy->driver_data;
|
|
u64 desired_perf;
|
|
int ret;
|
|
|
|
cpufreq_cpu_put(policy);
|
|
|
|
ret = cppc_get_desired_perf(cpu, &desired_perf);
|
|
if (ret < 0)
|
|
return -EIO;
|
|
|
|
return cppc_cpufreq_perf_to_khz(cpu_data, desired_perf);
|
|
}
|
|
|
|
static void cppc_check_hisi_workaround(void)
|
|
{
|
|
struct acpi_table_header *tbl;
|
|
acpi_status status = AE_OK;
|
|
int i;
|
|
|
|
status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);
|
|
if (ACPI_FAILURE(status) || !tbl)
|
|
return;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
|
|
if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
|
|
!memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
|
|
wa_info[i].oem_revision == tbl->oem_revision) {
|
|
/* Overwrite the get() callback */
|
|
cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;
|
|
break;
|
|
}
|
|
}
|
|
|
|
acpi_put_table(tbl);
|
|
}
|
|
|
|
static int __init cppc_cpufreq_init(void)
|
|
{
|
|
if ((acpi_disabled) || !acpi_cpc_valid())
|
|
return -ENODEV;
|
|
|
|
INIT_LIST_HEAD(&cpu_data_list);
|
|
|
|
cppc_check_hisi_workaround();
|
|
|
|
return cpufreq_register_driver(&cppc_cpufreq_driver);
|
|
}
|
|
|
|
static inline void free_cpu_data(void)
|
|
{
|
|
struct cppc_cpudata *iter, *tmp;
|
|
|
|
list_for_each_entry_safe(iter, tmp, &cpu_data_list, node) {
|
|
free_cpumask_var(iter->shared_cpu_map);
|
|
list_del(&iter->node);
|
|
kfree(iter);
|
|
}
|
|
|
|
}
|
|
|
|
static void __exit cppc_cpufreq_exit(void)
|
|
{
|
|
cpufreq_unregister_driver(&cppc_cpufreq_driver);
|
|
|
|
free_cpu_data();
|
|
}
|
|
|
|
module_exit(cppc_cpufreq_exit);
|
|
MODULE_AUTHOR("Ashwin Chaugule");
|
|
MODULE_DESCRIPTION("CPUFreq driver based on the ACPI CPPC v5.0+ spec");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
late_initcall(cppc_cpufreq_init);
|
|
|
|
static const struct acpi_device_id cppc_acpi_ids[] __used = {
|
|
{ACPI_PROCESSOR_DEVICE_HID, },
|
|
{}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(acpi, cppc_acpi_ids);
|