mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-16 16:54:20 +08:00
59c1502527
None of the sunxi pin controllers have a module reset line. All of the SoC documentation, where available, agrees. The bits that would be used for the PIO reset (i.e. matching the order of the clock gate bits) are always reserved, both in the CCU and in the PRCM. And experiments on several SoCs, including the A33, confirm that those reserved bits indeed have no effect. Let's remove this superfluous code and dependency, and also remove the include statement that was copied to the other r_pio drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220531053623.43851-2-samuel@sholland.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| pinctrl-sun4i-a10.c | ||
| pinctrl-sun5i.c | ||
| pinctrl-sun6i-a31-r.c | ||
| pinctrl-sun6i-a31.c | ||
| pinctrl-sun8i-a23-r.c | ||
| pinctrl-sun8i-a23.c | ||
| pinctrl-sun8i-a33.c | ||
| pinctrl-sun8i-a83t-r.c | ||
| pinctrl-sun8i-a83t.c | ||
| pinctrl-sun8i-h3-r.c | ||
| pinctrl-sun8i-h3.c | ||
| pinctrl-sun8i-v3s.c | ||
| pinctrl-sun9i-a80-r.c | ||
| pinctrl-sun9i-a80.c | ||
| pinctrl-sun50i-a64-r.c | ||
| pinctrl-sun50i-a64.c | ||
| pinctrl-sun50i-a100-r.c | ||
| pinctrl-sun50i-a100.c | ||
| pinctrl-sun50i-h5.c | ||
| pinctrl-sun50i-h6-r.c | ||
| pinctrl-sun50i-h6.c | ||
| pinctrl-sun50i-h616-r.c | ||
| pinctrl-sun50i-h616.c | ||
| pinctrl-suniv-f1c100s.c | ||
| pinctrl-sunxi.c | ||
| pinctrl-sunxi.h | ||