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BCM2835-ARM-Peripherals.pdf states that the I2C module's input clock is nominally 150MHz, and that value is currently reflected in bcm2835.dtsi. However, practical measurements show that the rate is actually 250MHz, and this agrees with various downstream kernels. Switch the I2C clock's frequency to 250MHz so that the generated bus clock rate is accurate. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
112 lines
2.4 KiB
Plaintext
112 lines
2.4 KiB
Plaintext
/include/ "skeleton.dtsi"
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/ {
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compatible = "brcm,bcm2835";
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model = "BCM2835";
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interrupt-parent = <&intc>;
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chosen {
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bootargs = "earlyprintk console=ttyAMA0";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x7e000000 0x20000000 0x02000000>;
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timer {
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compatible = "brcm,bcm2835-system-timer";
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reg = <0x7e003000 0x1000>;
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interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
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clock-frequency = <1000000>;
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};
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intc: interrupt-controller {
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compatible = "brcm,bcm2835-armctrl-ic";
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reg = <0x7e00b200 0x200>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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watchdog {
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compatible = "brcm,bcm2835-pm-wdt";
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reg = <0x7e100000 0x28>;
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};
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uart@20201000 {
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compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
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reg = <0x7e201000 0x1000>;
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interrupts = <2 25>;
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clock-frequency = <3000000>;
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};
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gpio: gpio {
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compatible = "brcm,bcm2835-gpio";
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reg = <0x7e200000 0xb4>;
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/*
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* The GPIO IP block is designed for 3 banks of GPIOs.
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* Each bank has a GPIO interrupt for itself.
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* There is an overall "any bank" interrupt.
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* In order, these are GIC interrupts 17, 18, 19, 20.
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* Since the BCM2835 only has 2 banks, the 2nd bank
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* interrupt output appears to be mirrored onto the
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* 3rd bank's interrupt signal.
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* So, a bank0 interrupt shows up on 17, 20, and
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* a bank1 interrupt shows up on 18, 19, 20!
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*/
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interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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i2c0: i2c@20205000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e205000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clk_i2c>;
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status = "disabled";
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};
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i2c1: i2c@20804000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e804000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clk_i2c>;
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status = "disabled";
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};
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sdhci: sdhci {
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compatible = "brcm,bcm2835-sdhci";
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reg = <0x7e300000 0x100>;
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interrupts = <2 30>;
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clocks = <&clk_mmc>;
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status = "disabled";
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk_mmc: mmc {
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compatible = "fixed-clock";
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reg = <0>;
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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clk_i2c: i2c {
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compatible = "fixed-clock";
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reg = <1>;
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#clock-cells = <0>;
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clock-frequency = <250000000>;
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};
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};
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};
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