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d817468c4b
This patch restores serial port operation which has been broken since
commit 60e9357547
("serial: samsung: enable clock before clearing
pending interrupts during init")
That commit only uncovered the real issue which was missing clkdev
entries for the "uart" clocks on S3C2440. It went unnoticed so far
because return value of clk API calls were not being checked at all
in the samsung serial port driver.
This patch should be backported to at least 3.10 stable kernel, since
the serial port has not been working on s3c2440 since 3.10-rc5.
Cc: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
[on S3C2440 SoC based Mini2440 board]
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Juergen Beisert <jbe@pengutronix.de>
Cc: <stable@vger.kernel.org> [3.10]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
287 lines
6.7 KiB
C
287 lines
6.7 KiB
C
/*
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410,S3C2440,S3C2442 Clock control support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/device.h>
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#include <linux/clk.h>
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#include <linux/mutex.h>
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#include <linux/delay.h>
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#include <linux/serial_core.h>
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#include <linux/io.h>
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#include <asm/mach/map.h>
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#include <mach/hardware.h>
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#include <plat/regs-serial.h>
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#include <mach/regs-clock.h>
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#include <mach/regs-gpio.h>
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#include <plat/clock.h>
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#include <plat/cpu.h>
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int s3c2410_clkcon_enable(struct clk *clk, int enable)
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{
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unsigned int clocks = clk->ctrlbit;
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unsigned long clkcon;
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clkcon = __raw_readl(S3C2410_CLKCON);
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if (enable)
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clkcon |= clocks;
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else
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clkcon &= ~clocks;
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/* ensure none of the special function bits set */
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clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER);
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__raw_writel(clkcon, S3C2410_CLKCON);
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return 0;
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}
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static int s3c2410_upll_enable(struct clk *clk, int enable)
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{
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unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
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unsigned long orig = clkslow;
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if (enable)
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clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF;
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else
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clkslow |= S3C2410_CLKSLOW_UCLK_OFF;
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__raw_writel(clkslow, S3C2410_CLKSLOW);
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/* if we started the UPLL, then allow to settle */
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if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF))
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udelay(200);
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return 0;
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}
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/* standard clock definitions */
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static struct clk init_clocks_off[] = {
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{
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.name = "nand",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_NAND,
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}, {
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.name = "sdi",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_SDI,
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}, {
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.name = "adc",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_ADC,
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}, {
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.name = "i2c",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_IIC,
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}, {
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.name = "iis",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_IIS,
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}, {
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.name = "spi",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_SPI,
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}
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};
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static struct clk clk_lcd = {
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.name = "lcd",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_LCDC,
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};
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static struct clk clk_gpio = {
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.name = "gpio",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_GPIO,
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};
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static struct clk clk_usb_host = {
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.name = "usb-host",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_USBH,
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};
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static struct clk clk_usb_device = {
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.name = "usb-device",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_USBD,
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};
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static struct clk clk_timers = {
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.name = "timers",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_PWMT,
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};
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struct clk s3c24xx_clk_uart0 = {
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.name = "uart",
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.devname = "s3c2410-uart.0",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART0,
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};
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struct clk s3c24xx_clk_uart1 = {
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.name = "uart",
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.devname = "s3c2410-uart.1",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART1,
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};
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struct clk s3c24xx_clk_uart2 = {
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.name = "uart",
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.devname = "s3c2410-uart.2",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART2,
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};
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static struct clk clk_rtc = {
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.name = "rtc",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_RTC,
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};
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static struct clk clk_watchdog = {
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.name = "watchdog",
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.parent = &clk_p,
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.ctrlbit = 0,
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};
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static struct clk clk_usb_bus_host = {
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.name = "usb-bus-host",
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.parent = &clk_usb_bus,
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};
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static struct clk clk_usb_bus_gadget = {
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.name = "usb-bus-gadget",
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.parent = &clk_usb_bus,
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};
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static struct clk *init_clocks[] = {
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&clk_lcd,
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&clk_gpio,
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&clk_usb_host,
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&clk_usb_device,
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&clk_timers,
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&s3c24xx_clk_uart0,
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&s3c24xx_clk_uart1,
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&s3c24xx_clk_uart2,
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&clk_rtc,
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&clk_watchdog,
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&clk_usb_bus_host,
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&clk_usb_bus_gadget,
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};
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/* s3c2410_baseclk_add()
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*
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* Add all the clocks used by the s3c2410 or compatible CPUs
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* such as the S3C2440 and S3C2442.
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*
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* We cannot use a system device as we are needed before any
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* of the init-calls that initialise the devices are actually
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* done.
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*/
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int __init s3c2410_baseclk_add(void)
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{
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unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
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unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
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struct clk *xtal;
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int ret;
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int ptr;
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clk_upll.enable = s3c2410_upll_enable;
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if (s3c24xx_register_clock(&clk_usb_bus) < 0)
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printk(KERN_ERR "failed to register usb bus clock\n");
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/* register clocks from clock array */
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) {
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struct clk *clkp = init_clocks[ptr];
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/* ensure that we note the clock state */
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clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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}
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/* We must be careful disabling the clocks we are not intending to
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* be using at boot time, as subsystems such as the LCD which do
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* their own DMA requests to the bus can cause the system to lockup
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* if they where in the middle of requesting bus access.
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*
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* Disabling the LCD clock if the LCD is active is very dangerous,
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* and therefore the bootloader should be careful to not enable
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* the LCD clock if it is not needed.
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*/
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/* install (and disable) the clocks we do not need immediately */
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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/* show the clock-slow value */
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xtal = clk_get(NULL, "xtal");
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printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n",
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print_mhz(clk_get_rate(xtal) /
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( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))),
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(clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast",
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(clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
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(clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
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s3c_pwmclk_init();
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return 0;
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}
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