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ba59a80788
Replace the deprecated master->transfer with transfer_one_message() and allow the SPI subsystem handle all the queuing of messages. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
511 lines
11 KiB
C
511 lines
11 KiB
C
/*
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* Marvell Orion SPI controller driver
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*
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* Author: Shadi Ammouri <shadi@marvell.com>
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* Copyright (C) 2007-2008 Marvell Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/spi/spi.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <asm/unaligned.h>
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#define DRIVER_NAME "orion_spi"
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#define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/
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#define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */
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#define ORION_SPI_IF_CTRL_REG 0x00
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#define ORION_SPI_IF_CONFIG_REG 0x04
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#define ORION_SPI_DATA_OUT_REG 0x08
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#define ORION_SPI_DATA_IN_REG 0x0c
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#define ORION_SPI_INT_CAUSE_REG 0x10
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#define ORION_SPI_IF_8_16_BIT_MODE (1 << 5)
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#define ORION_SPI_CLK_PRESCALE_MASK 0x1F
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struct orion_spi {
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struct spi_master *master;
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void __iomem *base;
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unsigned int max_speed;
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unsigned int min_speed;
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struct clk *clk;
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};
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static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg)
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{
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return orion_spi->base + reg;
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}
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static inline void
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orion_spi_setbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
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{
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void __iomem *reg_addr = spi_reg(orion_spi, reg);
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u32 val;
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val = readl(reg_addr);
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val |= mask;
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writel(val, reg_addr);
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}
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static inline void
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orion_spi_clrbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
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{
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void __iomem *reg_addr = spi_reg(orion_spi, reg);
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u32 val;
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val = readl(reg_addr);
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val &= ~mask;
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writel(val, reg_addr);
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}
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static int orion_spi_set_transfer_size(struct orion_spi *orion_spi, int size)
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{
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if (size == 16) {
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orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
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ORION_SPI_IF_8_16_BIT_MODE);
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} else if (size == 8) {
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orion_spi_clrbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
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ORION_SPI_IF_8_16_BIT_MODE);
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} else {
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pr_debug("Bad bits per word value %d (only 8 or 16 are "
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"allowed).\n", size);
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return -EINVAL;
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}
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return 0;
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}
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static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
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{
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u32 tclk_hz;
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u32 rate;
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u32 prescale;
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u32 reg;
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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tclk_hz = clk_get_rate(orion_spi->clk);
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/*
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* the supported rates are: 4,6,8...30
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* round up as we look for equal or less speed
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*/
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rate = DIV_ROUND_UP(tclk_hz, speed);
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rate = roundup(rate, 2);
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/* check if requested speed is too small */
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if (rate > 30)
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return -EINVAL;
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if (rate < 4)
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rate = 4;
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/* Convert the rate to SPI clock divisor value. */
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prescale = 0x10 + rate/2;
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reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
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reg = ((reg & ~ORION_SPI_CLK_PRESCALE_MASK) | prescale);
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writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
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return 0;
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}
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/*
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* called only when no transfer is active on the bus
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*/
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static int
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orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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{
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struct orion_spi *orion_spi;
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unsigned int speed = spi->max_speed_hz;
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unsigned int bits_per_word = spi->bits_per_word;
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int rc;
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orion_spi = spi_master_get_devdata(spi->master);
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if ((t != NULL) && t->speed_hz)
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speed = t->speed_hz;
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if ((t != NULL) && t->bits_per_word)
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bits_per_word = t->bits_per_word;
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rc = orion_spi_baudrate_set(spi, speed);
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if (rc)
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return rc;
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return orion_spi_set_transfer_size(orion_spi, bits_per_word);
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}
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static void orion_spi_set_cs(struct orion_spi *orion_spi, int enable)
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{
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if (enable)
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orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
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else
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orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
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}
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static inline int orion_spi_wait_till_ready(struct orion_spi *orion_spi)
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{
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int i;
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for (i = 0; i < ORION_SPI_WAIT_RDY_MAX_LOOP; i++) {
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if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
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return 1;
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else
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udelay(1);
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}
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return -1;
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}
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static inline int
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orion_spi_write_read_8bit(struct spi_device *spi,
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const u8 **tx_buf, u8 **rx_buf)
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{
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void __iomem *tx_reg, *rx_reg, *int_reg;
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
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rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
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int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
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/* clear the interrupt cause register */
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writel(0x0, int_reg);
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if (tx_buf && *tx_buf)
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writel(*(*tx_buf)++, tx_reg);
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else
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writel(0, tx_reg);
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if (orion_spi_wait_till_ready(orion_spi) < 0) {
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dev_err(&spi->dev, "TXS timed out\n");
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return -1;
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}
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if (rx_buf && *rx_buf)
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*(*rx_buf)++ = readl(rx_reg);
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return 1;
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}
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static inline int
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orion_spi_write_read_16bit(struct spi_device *spi,
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const u16 **tx_buf, u16 **rx_buf)
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{
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void __iomem *tx_reg, *rx_reg, *int_reg;
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
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rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
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int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
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/* clear the interrupt cause register */
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writel(0x0, int_reg);
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if (tx_buf && *tx_buf)
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writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg);
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else
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writel(0, tx_reg);
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if (orion_spi_wait_till_ready(orion_spi) < 0) {
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dev_err(&spi->dev, "TXS timed out\n");
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return -1;
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}
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if (rx_buf && *rx_buf)
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put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++);
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return 1;
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}
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static unsigned int
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orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
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{
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struct orion_spi *orion_spi;
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unsigned int count;
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int word_len;
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orion_spi = spi_master_get_devdata(spi->master);
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word_len = spi->bits_per_word;
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count = xfer->len;
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if (word_len == 8) {
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const u8 *tx = xfer->tx_buf;
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u8 *rx = xfer->rx_buf;
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do {
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if (orion_spi_write_read_8bit(spi, &tx, &rx) < 0)
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goto out;
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count--;
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} while (count);
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} else if (word_len == 16) {
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const u16 *tx = xfer->tx_buf;
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u16 *rx = xfer->rx_buf;
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do {
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if (orion_spi_write_read_16bit(spi, &tx, &rx) < 0)
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goto out;
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count -= 2;
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} while (count);
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}
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out:
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return xfer->len - count;
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}
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static int orion_spi_transfer_one_message(struct spi_master *master,
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struct spi_message *m)
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{
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struct orion_spi *orion_spi = spi_master_get_devdata(master);
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struct spi_device *spi = m->spi;
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struct spi_transfer *t = NULL;
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int par_override = 0;
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int status = 0;
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int cs_active = 0;
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/* Load defaults */
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status = orion_spi_setup_transfer(spi, NULL);
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if (status < 0)
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goto msg_done;
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list_for_each_entry(t, &m->transfers, transfer_list) {
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/* make sure buffer length is even when working in 16
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* bit mode*/
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if ((t->bits_per_word == 16) && (t->len & 1)) {
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dev_err(&spi->dev,
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"message rejected : "
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"odd data length %d while in 16 bit mode\n",
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t->len);
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status = -EIO;
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goto msg_done;
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}
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if (t->speed_hz && t->speed_hz < orion_spi->min_speed) {
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dev_err(&spi->dev,
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"message rejected : "
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"device min speed (%d Hz) exceeds "
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"required transfer speed (%d Hz)\n",
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orion_spi->min_speed, t->speed_hz);
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status = -EIO;
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goto msg_done;
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}
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if (par_override || t->speed_hz || t->bits_per_word) {
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par_override = 1;
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status = orion_spi_setup_transfer(spi, t);
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if (status < 0)
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break;
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if (!t->speed_hz && !t->bits_per_word)
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par_override = 0;
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}
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if (!cs_active) {
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orion_spi_set_cs(orion_spi, 1);
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cs_active = 1;
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}
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if (t->len)
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m->actual_length += orion_spi_write_read(spi, t);
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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if (t->cs_change) {
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orion_spi_set_cs(orion_spi, 0);
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cs_active = 0;
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}
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}
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msg_done:
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if (cs_active)
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orion_spi_set_cs(orion_spi, 0);
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m->status = status;
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spi_finalize_current_message(master);
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return 0;
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}
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static int __init orion_spi_reset(struct orion_spi *orion_spi)
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{
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/* Verify that the CS is deasserted */
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orion_spi_set_cs(orion_spi, 0);
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return 0;
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}
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static int orion_spi_setup(struct spi_device *spi)
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{
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struct orion_spi *orion_spi;
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orion_spi = spi_master_get_devdata(spi->master);
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if ((spi->max_speed_hz == 0)
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|| (spi->max_speed_hz > orion_spi->max_speed))
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spi->max_speed_hz = orion_spi->max_speed;
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if (spi->max_speed_hz < orion_spi->min_speed) {
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dev_err(&spi->dev, "setup: requested speed too low %d Hz\n",
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spi->max_speed_hz);
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return -EINVAL;
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}
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/*
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* baudrate & width will be set orion_spi_setup_transfer
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*/
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return 0;
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}
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static int __init orion_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct orion_spi *spi;
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struct resource *r;
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unsigned long tclk_hz;
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int status = 0;
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const u32 *iprop;
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int size;
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master = spi_alloc_master(&pdev->dev, sizeof *spi);
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if (master == NULL) {
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dev_dbg(&pdev->dev, "master allocation failed\n");
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return -ENOMEM;
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}
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if (pdev->id != -1)
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master->bus_num = pdev->id;
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if (pdev->dev.of_node) {
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iprop = of_get_property(pdev->dev.of_node, "cell-index",
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&size);
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if (iprop && size == sizeof(*iprop))
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master->bus_num = *iprop;
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}
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/* we support only mode 0, and no options */
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master->mode_bits = 0;
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master->setup = orion_spi_setup;
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master->transfer_one_message = orion_spi_transfer_one_message;
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master->num_chipselect = ORION_NUM_CHIPSELECTS;
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dev_set_drvdata(&pdev->dev, master);
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spi = spi_master_get_devdata(master);
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spi->master = master;
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spi->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(spi->clk)) {
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status = PTR_ERR(spi->clk);
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goto out;
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}
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clk_prepare(spi->clk);
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clk_enable(spi->clk);
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tclk_hz = clk_get_rate(spi->clk);
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spi->max_speed = DIV_ROUND_UP(tclk_hz, 4);
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spi->min_speed = DIV_ROUND_UP(tclk_hz, 30);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (r == NULL) {
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status = -ENODEV;
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goto out_rel_clk;
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}
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if (!request_mem_region(r->start, resource_size(r),
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dev_name(&pdev->dev))) {
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status = -EBUSY;
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goto out_rel_clk;
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}
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spi->base = ioremap(r->start, SZ_1K);
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if (orion_spi_reset(spi) < 0)
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goto out_rel_mem;
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master->dev.of_node = pdev->dev.of_node;
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status = spi_register_master(master);
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if (status < 0)
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goto out_rel_mem;
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return status;
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out_rel_mem:
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release_mem_region(r->start, resource_size(r));
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out_rel_clk:
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clk_disable_unprepare(spi->clk);
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clk_put(spi->clk);
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out:
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spi_master_put(master);
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return status;
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}
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static int __exit orion_spi_remove(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct resource *r;
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struct orion_spi *spi;
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master = dev_get_drvdata(&pdev->dev);
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spi = spi_master_get_devdata(master);
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clk_disable_unprepare(spi->clk);
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clk_put(spi->clk);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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release_mem_region(r->start, resource_size(r));
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spi_unregister_master(master);
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return 0;
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}
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MODULE_ALIAS("platform:" DRIVER_NAME);
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static const struct of_device_id orion_spi_of_match_table[] __devinitdata = {
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{ .compatible = "marvell,orion-spi", },
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{}
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};
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MODULE_DEVICE_TABLE(of, orion_spi_of_match_table);
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static struct platform_driver orion_spi_driver = {
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(orion_spi_of_match_table),
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},
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.remove = __exit_p(orion_spi_remove),
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};
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static int __init orion_spi_init(void)
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{
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return platform_driver_probe(&orion_spi_driver, orion_spi_probe);
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}
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module_init(orion_spi_init);
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static void __exit orion_spi_exit(void)
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{
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platform_driver_unregister(&orion_spi_driver);
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}
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module_exit(orion_spi_exit);
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MODULE_DESCRIPTION("Orion SPI driver");
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MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
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MODULE_LICENSE("GPL");
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