mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-19 00:54:41 +08:00
e52ec42853
This branch adds two devices to the BCM2835 SoC device tree: the SPI controller and the HW random number generator. The SPI controller isn't actually instantiated in the Raspberry Pi device tree, since there are no on-board SPI devices; it's up to the end-user to modify their own device-tree to describe whatever they have attached. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRXiScAAoJEJuNpwkmVCGckMkP/RFLV7a4QQORyO9HhZkqaMGD iwHtHFiFgbFmrc76oe/DxJrnJieSWdreVSWXc5NpAv6uZqMx7Lc11dGV399R+v0C IaB7z7lMHBOk2IOmjIwVby8vrrHX5Ui7vweYxjk9k117U7ZN/syAcaPQsj32W6Lr wKn+CpmyIzU0iB0kyydLfS18znW7gd17WFOu8tYB3qqf+avJNzcOfNHaIlafG0s6 +qn/gBWPRNg/ceyV94kPyjsPoLqv1q3YJER1P9Tvyb9MQecwpBd/ZmZjWr14hMf0 SvjsHD2uLV8UO0Wq/R5+VnC1YybsrOAvbgZz06Ai+SDa33diHXp4/uXqJ0soWTT8 hG4a2V965LfCUNVHFmAGL8ZcZk/HaL4FLucKceDavcorFuN7rtK+q6rAoYk0cR8j bYi0xIIPctd28Mkpx1ArifeAa9+jeAxwC79H3jn9xzdYBdVJkV6SgSBZPQFbQviP eFJu+Rh2QOA2Icm2dLOr6aZXdGWFO8DBF9LSLzXaX5yOaUYsGNKLBl7JOY+0MA47 P6TMokbHRULKqSfgUJxf+jCcXKl8hOB/obSw3SX1sTVxaAmi2IL39salwIQXloIz /1Wjgbv2eVxtSbM9XResvpsTxE6RdZuz0uE5BKgXIvI6fwdZ9uQaAWvxphn0MvXt Qz0aMbTD0wEIANE6j/u4 =4Sjv -----END PGP SIGNATURE----- Merge tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/dt From Stephen Warren <swarren@wwwdotorg.org>: ARM: bcm2835: device tree updates This branch adds two devices to the BCM2835 SoC device tree: the SPI controller and the HW random number generator. The SPI controller isn't actually instantiated in the Raspberry Pi device tree, since there are no on-board SPI devices; it's up to the end-user to modify their own device-tree to describe whatever they have attached. * tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi: ARM: bcm2835: add Broadcom BCM2835 RNG to the device tree ARM: bcm2835: add SPI device to DT Signed-off-by: Arnd Bergmann <arnd@arndb.de>
134 lines
2.8 KiB
Plaintext
134 lines
2.8 KiB
Plaintext
/include/ "skeleton.dtsi"
|
|
|
|
/ {
|
|
compatible = "brcm,bcm2835";
|
|
model = "BCM2835";
|
|
interrupt-parent = <&intc>;
|
|
|
|
chosen {
|
|
bootargs = "earlyprintk console=ttyAMA0";
|
|
};
|
|
|
|
soc {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x7e000000 0x20000000 0x02000000>;
|
|
|
|
timer {
|
|
compatible = "brcm,bcm2835-system-timer";
|
|
reg = <0x7e003000 0x1000>;
|
|
interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
|
|
clock-frequency = <1000000>;
|
|
};
|
|
|
|
intc: interrupt-controller {
|
|
compatible = "brcm,bcm2835-armctrl-ic";
|
|
reg = <0x7e00b200 0x200>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
watchdog {
|
|
compatible = "brcm,bcm2835-pm-wdt";
|
|
reg = <0x7e100000 0x28>;
|
|
};
|
|
|
|
rng {
|
|
compatible = "brcm,bcm2835-rng";
|
|
reg = <0x7e104000 0x10>;
|
|
};
|
|
|
|
uart@20201000 {
|
|
compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
|
|
reg = <0x7e201000 0x1000>;
|
|
interrupts = <2 25>;
|
|
clock-frequency = <3000000>;
|
|
};
|
|
|
|
gpio: gpio {
|
|
compatible = "brcm,bcm2835-gpio";
|
|
reg = <0x7e200000 0xb4>;
|
|
/*
|
|
* The GPIO IP block is designed for 3 banks of GPIOs.
|
|
* Each bank has a GPIO interrupt for itself.
|
|
* There is an overall "any bank" interrupt.
|
|
* In order, these are GIC interrupts 17, 18, 19, 20.
|
|
* Since the BCM2835 only has 2 banks, the 2nd bank
|
|
* interrupt output appears to be mirrored onto the
|
|
* 3rd bank's interrupt signal.
|
|
* So, a bank0 interrupt shows up on 17, 20, and
|
|
* a bank1 interrupt shows up on 18, 19, 20!
|
|
*/
|
|
interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
spi: spi@20204000 {
|
|
compatible = "brcm,bcm2835-spi";
|
|
reg = <0x7e204000 0x1000>;
|
|
interrupts = <2 22>;
|
|
clocks = <&clk_spi>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c0: i2c@20205000 {
|
|
compatible = "brcm,bcm2835-i2c";
|
|
reg = <0x7e205000 0x1000>;
|
|
interrupts = <2 21>;
|
|
clocks = <&clk_i2c>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@20804000 {
|
|
compatible = "brcm,bcm2835-i2c";
|
|
reg = <0x7e804000 0x1000>;
|
|
interrupts = <2 21>;
|
|
clocks = <&clk_i2c>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhci: sdhci {
|
|
compatible = "brcm,bcm2835-sdhci";
|
|
reg = <0x7e300000 0x100>;
|
|
interrupts = <2 30>;
|
|
clocks = <&clk_mmc>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
clocks {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
clk_mmc: mmc {
|
|
compatible = "fixed-clock";
|
|
reg = <0>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <100000000>;
|
|
};
|
|
|
|
clk_i2c: i2c {
|
|
compatible = "fixed-clock";
|
|
reg = <1>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <250000000>;
|
|
};
|
|
|
|
clk_spi: spi {
|
|
compatible = "fixed-clock";
|
|
reg = <2>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <250000000>;
|
|
};
|
|
};
|
|
};
|