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ed81f5fc3c
When DT overlays are applied, each FPGA region keeps track of the fpga image info as region->info. This pointer is assigned only if an overlay causes the FPGA to be programmed. As it stands, this pointer can be overwritten, causing a slow warning later when overlays are removed. This patch fixes this by changing the allowed behaviour. If a region has received an overlay that programmed the FPGA, reject other overlays that try to program the FPGA. To reprogram the FPGA, first remove the overlay. This makes sense as removing the overlay also removes the devices cleanly. Note that overlays that make DT changes without reprogramming the FPGA are exempt from this restriction. Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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.. | ||
altera-cvp.c | ||
altera-fpga2sdram.c | ||
altera-freeze-bridge.c | ||
altera-hps2fpga.c | ||
altera-pr-ip-core-plat.c | ||
altera-pr-ip-core.c | ||
altera-ps-spi.c | ||
fpga-bridge.c | ||
fpga-mgr.c | ||
fpga-region.c | ||
ice40-spi.c | ||
Kconfig | ||
Makefile | ||
socfpga-a10.c | ||
socfpga.c | ||
ts73xx-fpga.c | ||
xilinx-pr-decoupler.c | ||
xilinx-spi.c | ||
zynq-fpga.c |