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This implements a powerpc version of perf_arch_fetch_caller_regs to get correct call-graphs. It's implemented in assembly because that way we can be sure there isn't a stack frame for perf_arch_fetch_caller_regs. If it was in C, gcc might or might not create a stack frame for it, which would affect the number of levels we have to skip. With this, we see results from perf record -e lock:lock_acquire like this: # Samples: 24878 # # Overhead Command Shared Object Symbol # ........ .............. ................. ...... # 14.99% perf [kernel.kallsyms] [k] ._raw_spin_lock | --- ._raw_spin_lock | |--25.00%-- .alloc_fd | (nil) | | | |--50.00%-- .anon_inode_getfd | | .sys_perf_event_open | | syscall_exit | | syscall | | create_counter | | __cmd_record | | run_builtin | | main | | 0xfd2e704 | | 0xfd2e8c0 | | (nil) ... etc. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: anton@samba.org Cc: linuxppc-dev@ozlabs.org Cc: Peter Zijlstra <peterz@infradead.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <20100318050513.GA6575@drongo> Signed-off-by: Ingo Molnar <mingo@elte.hu>
158 lines
3.2 KiB
ArmAsm
158 lines
3.2 KiB
ArmAsm
/*
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* This file contains miscellaneous low-level functions.
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
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* and Paul Mackerras.
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*
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* Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
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* PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
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*
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* setjmp/longjmp code by Paul Mackerras.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/ppc_asm.h>
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#include <asm/unistd.h>
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#include <asm/asm-compat.h>
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#include <asm/asm-offsets.h>
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.text
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/*
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* Returns (address we are running at) - (address we were linked at)
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* for use before the text and data are mapped to KERNELBASE.
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*/
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_GLOBAL(reloc_offset)
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mflr r0
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bl 1f
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1: mflr r3
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PPC_LL r4,(2f-1b)(r3)
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subf r3,r4,r3
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mtlr r0
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blr
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.align 3
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2: PPC_LONG 1b
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/*
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* add_reloc_offset(x) returns x + reloc_offset().
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*/
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_GLOBAL(add_reloc_offset)
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mflr r0
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bl 1f
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1: mflr r5
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PPC_LL r4,(2f-1b)(r5)
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subf r5,r4,r5
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add r3,r3,r5
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mtlr r0
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blr
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.align 3
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2: PPC_LONG 1b
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_GLOBAL(kernel_execve)
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li r0,__NR_execve
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sc
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bnslr
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neg r3,r3
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blr
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_GLOBAL(setjmp)
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mflr r0
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PPC_STL r0,0(r3)
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PPC_STL r1,SZL(r3)
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PPC_STL r2,2*SZL(r3)
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mfcr r0
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PPC_STL r0,3*SZL(r3)
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PPC_STL r13,4*SZL(r3)
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PPC_STL r14,5*SZL(r3)
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PPC_STL r15,6*SZL(r3)
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PPC_STL r16,7*SZL(r3)
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PPC_STL r17,8*SZL(r3)
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PPC_STL r18,9*SZL(r3)
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PPC_STL r19,10*SZL(r3)
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PPC_STL r20,11*SZL(r3)
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PPC_STL r21,12*SZL(r3)
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PPC_STL r22,13*SZL(r3)
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PPC_STL r23,14*SZL(r3)
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PPC_STL r24,15*SZL(r3)
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PPC_STL r25,16*SZL(r3)
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PPC_STL r26,17*SZL(r3)
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PPC_STL r27,18*SZL(r3)
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PPC_STL r28,19*SZL(r3)
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PPC_STL r29,20*SZL(r3)
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PPC_STL r30,21*SZL(r3)
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PPC_STL r31,22*SZL(r3)
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li r3,0
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blr
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_GLOBAL(longjmp)
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PPC_LCMPI r4,0
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bne 1f
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li r4,1
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1: PPC_LL r13,4*SZL(r3)
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PPC_LL r14,5*SZL(r3)
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PPC_LL r15,6*SZL(r3)
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PPC_LL r16,7*SZL(r3)
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PPC_LL r17,8*SZL(r3)
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PPC_LL r18,9*SZL(r3)
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PPC_LL r19,10*SZL(r3)
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PPC_LL r20,11*SZL(r3)
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PPC_LL r21,12*SZL(r3)
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PPC_LL r22,13*SZL(r3)
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PPC_LL r23,14*SZL(r3)
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PPC_LL r24,15*SZL(r3)
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PPC_LL r25,16*SZL(r3)
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PPC_LL r26,17*SZL(r3)
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PPC_LL r27,18*SZL(r3)
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PPC_LL r28,19*SZL(r3)
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PPC_LL r29,20*SZL(r3)
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PPC_LL r30,21*SZL(r3)
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PPC_LL r31,22*SZL(r3)
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PPC_LL r0,3*SZL(r3)
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mtcrf 0x38,r0
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PPC_LL r0,0(r3)
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PPC_LL r1,SZL(r3)
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PPC_LL r2,2*SZL(r3)
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mtlr r0
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mr r3,r4
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blr
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_GLOBAL(__setup_cpu_power7)
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_GLOBAL(__restore_cpu_power7)
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/* place holder */
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blr
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#ifdef CONFIG_EVENT_TRACING
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/*
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* Get a minimal set of registers for our caller's nth caller.
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* r3 = regs pointer, r5 = n.
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*
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* We only get R1 (stack pointer), NIP (next instruction pointer)
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* and LR (link register). These are all we can get in the
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* general case without doing complicated stack unwinding, but
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* fortunately they are enough to do a stack backtrace, which
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* is all we need them for.
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*/
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_GLOBAL(perf_arch_fetch_caller_regs)
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mr r6,r1
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cmpwi r5,0
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mflr r4
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ble 2f
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mtctr r5
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1: PPC_LL r6,0(r6)
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bdnz 1b
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PPC_LL r4,PPC_LR_STKOFF(r6)
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2: PPC_LL r7,0(r6)
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PPC_LL r7,PPC_LR_STKOFF(r7)
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PPC_STL r6,GPR1-STACK_FRAME_OVERHEAD(r3)
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PPC_STL r4,_NIP-STACK_FRAME_OVERHEAD(r3)
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PPC_STL r7,_LINK-STACK_FRAME_OVERHEAD(r3)
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blr
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#endif /* CONFIG_EVENT_TRACING */
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