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ecd2bacfbb
The CPUs on Qualcomm ipq based devices are clocked by an alpha PLL. Add support for the apss pll found on ipq based devices which can support CPU frequencies above 1Ghz. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1592800092-20533-3-git-send-email-sivaprak@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
70 lines
2.7 KiB
Makefile
70 lines
2.7 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
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clk-qcom-y += common.o
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clk-qcom-y += clk-regmap.o
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clk-qcom-y += clk-alpha-pll.o
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clk-qcom-y += clk-pll.o
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clk-qcom-y += clk-rcg.o
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clk-qcom-y += clk-rcg2.o
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clk-qcom-y += clk-branch.o
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clk-qcom-y += clk-regmap-divider.o
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clk-qcom-y += clk-regmap-mux.o
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clk-qcom-y += clk-regmap-mux-div.o
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clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-krait.o
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clk-qcom-y += clk-hfpll.o
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clk-qcom-y += reset.o
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clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o
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# Keep alphabetically sorted by config
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obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o
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obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
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obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
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obj-$(CONFIG_IPQ_GCC_4019) += gcc-ipq4019.o
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obj-$(CONFIG_IPQ_GCC_6018) += gcc-ipq6018.o
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obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o
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obj-$(CONFIG_IPQ_GCC_8074) += gcc-ipq8074.o
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obj-$(CONFIG_IPQ_LCC_806X) += lcc-ipq806x.o
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obj-$(CONFIG_MDM_GCC_9615) += gcc-mdm9615.o
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obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o
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obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o
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obj-$(CONFIG_MSM_GCC_8916) += gcc-msm8916.o
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obj-$(CONFIG_MSM_GCC_8939) += gcc-msm8939.o
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obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
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obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
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obj-$(CONFIG_MSM_GCC_8994) += gcc-msm8994.o
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obj-$(CONFIG_MSM_GCC_8996) += gcc-msm8996.o
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obj-$(CONFIG_MSM_LCC_8960) += lcc-msm8960.o
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obj-$(CONFIG_MSM_GCC_8998) += gcc-msm8998.o
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obj-$(CONFIG_MSM_GPUCC_8998) += gpucc-msm8998.o
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obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
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obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
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obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
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obj-$(CONFIG_MSM_MMCC_8998) += mmcc-msm8998.o
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obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o
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obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o
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obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
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obj-$(CONFIG_QCOM_CLK_RPMH) += clk-rpmh.o
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obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o
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obj-$(CONFIG_QCS_GCC_404) += gcc-qcs404.o
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obj-$(CONFIG_QCS_Q6SSTOP_404) += q6sstop-qcs404.o
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obj-$(CONFIG_QCS_TURING_404) += turingcc-qcs404.o
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obj-$(CONFIG_SC_DISPCC_7180) += dispcc-sc7180.o
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obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o
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obj-$(CONFIG_SC_GPUCC_7180) += gpucc-sc7180.o
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obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o
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obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o
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obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o
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obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o
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obj-$(CONFIG_SDM_GCC_660) += gcc-sdm660.o
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obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o
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obj-$(CONFIG_SDM_GPUCC_845) += gpucc-sdm845.o
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obj-$(CONFIG_SDM_LPASSCC_845) += lpasscc-sdm845.o
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obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o
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obj-$(CONFIG_SM_GCC_8150) += gcc-sm8150.o
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obj-$(CONFIG_SM_GCC_8250) += gcc-sm8250.o
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obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
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obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
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obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
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obj-$(CONFIG_KRAITCC) += krait-cc.o
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