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c9d8725926
No functional changes, just fixing one easy to spot sparse error. While fixing that sparse error, I had to add two includes to a header to avoid a build error. Signed-off-by: Felipe Balbi <balbi@ti.com>
126 lines
3.2 KiB
C
126 lines
3.2 KiB
C
/*
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* Copyright (C) 2009
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* Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
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*
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* Description:
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* Helper routines for i.MX3x SoCs from Freescale, needed by the fsl_usb2_udc.c
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* driver to function correctly on these systems.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/fsl_devices.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include "fsl_usb2_udc.h"
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static struct clk *mxc_ahb_clk;
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static struct clk *mxc_per_clk;
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static struct clk *mxc_ipg_clk;
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/* workaround ENGcm09152 for i.MX35 */
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#define MX35_USBPHYCTRL_OFFSET 0x600
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#define USBPHYCTRL_OTGBASE_OFFSET 0x8
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#define USBPHYCTRL_EVDO (1 << 23)
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int fsl_udc_clk_init(struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata;
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unsigned long freq;
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int ret;
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pdata = dev_get_platdata(&pdev->dev);
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mxc_ipg_clk = devm_clk_get(&pdev->dev, "ipg");
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if (IS_ERR(mxc_ipg_clk)) {
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dev_err(&pdev->dev, "clk_get(\"ipg\") failed\n");
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return PTR_ERR(mxc_ipg_clk);
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}
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mxc_ahb_clk = devm_clk_get(&pdev->dev, "ahb");
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if (IS_ERR(mxc_ahb_clk)) {
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dev_err(&pdev->dev, "clk_get(\"ahb\") failed\n");
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return PTR_ERR(mxc_ahb_clk);
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}
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mxc_per_clk = devm_clk_get(&pdev->dev, "per");
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if (IS_ERR(mxc_per_clk)) {
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dev_err(&pdev->dev, "clk_get(\"per\") failed\n");
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return PTR_ERR(mxc_per_clk);
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}
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clk_prepare_enable(mxc_ipg_clk);
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clk_prepare_enable(mxc_ahb_clk);
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clk_prepare_enable(mxc_per_clk);
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/* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
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if (!strcmp(pdev->id_entry->name, "imx-udc-mx27")) {
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freq = clk_get_rate(mxc_per_clk);
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if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
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(freq < 59999000 || freq > 60001000)) {
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dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
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ret = -EINVAL;
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goto eclkrate;
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}
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}
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return 0;
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eclkrate:
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clk_disable_unprepare(mxc_ipg_clk);
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clk_disable_unprepare(mxc_ahb_clk);
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clk_disable_unprepare(mxc_per_clk);
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mxc_per_clk = NULL;
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return ret;
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}
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int fsl_udc_clk_finalize(struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
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int ret = 0;
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/* workaround ENGcm09152 for i.MX35 */
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if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
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unsigned int v;
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struct resource *res = platform_get_resource
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(pdev, IORESOURCE_MEM, 0);
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void __iomem *phy_regs = ioremap(res->start +
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MX35_USBPHYCTRL_OFFSET, 512);
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if (!phy_regs) {
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dev_err(&pdev->dev, "ioremap for phy address fails\n");
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ret = -EINVAL;
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goto ioremap_err;
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}
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v = readl(phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
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writel(v | USBPHYCTRL_EVDO,
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phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
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iounmap(phy_regs);
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}
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ioremap_err:
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/* ULPI transceivers don't need usbpll */
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if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
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clk_disable_unprepare(mxc_per_clk);
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mxc_per_clk = NULL;
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}
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return ret;
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}
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void fsl_udc_clk_release(void)
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{
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if (mxc_per_clk)
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clk_disable_unprepare(mxc_per_clk);
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clk_disable_unprepare(mxc_ahb_clk);
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clk_disable_unprepare(mxc_ipg_clk);
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}
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