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0564f7d946
This converts the ABx500 pin controller and all associated device trees to use the standard, generic config bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
429 lines
9.3 KiB
Plaintext
429 lines
9.3 KiB
Plaintext
/*
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* Copyright 2014 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/ {
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soc {
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prcmu@80157000 {
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ab8500 {
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ab8500-gpio {
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/* Hog a few default settings */
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pinctrl-names = "default";
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pinctrl-0 = <&gpio2_default_mode>,
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<&gpio4_default_mode>,
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<&gpio10_default_mode>,
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<&gpio11_default_mode>,
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<&gpio12_default_mode>,
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<&gpio13_default_mode>,
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<&gpio16_default_mode>,
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<&gpio24_default_mode>,
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<&gpio25_default_mode>,
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<&gpio36_default_mode>,
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<&gpio37_default_mode>,
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<&gpio38_default_mode>,
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<&gpio39_default_mode>,
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<&gpio42_default_mode>,
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<&gpio26_default_mode>,
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<&gpio35_default_mode>,
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<&ycbcr_default_mode>,
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<&pwm_default_mode>,
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<&adi1_default_mode>,
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<&usbuicc_default_mode>,
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<&dmic_default_mode>,
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<&extcpena_default_mode>,
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<&modsclsda_default_mode>;
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/*
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* Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
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* are muxed in as GPIO, and configured as INPUT PULL DOWN
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*/
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gpio2 {
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gpio2_default_mode: gpio2_default {
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default_mux {
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function = "gpio";
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groups = "gpio2_a_1";
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};
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default_cfg {
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pins = "GPIO2_T9";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio4 {
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gpio4_default_mode: gpio4_default {
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default_mux {
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function = "gpio";
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groups = "gpio4_a_1";
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};
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default_cfg {
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pins = "GPIO4_W2";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio10 {
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gpio10_default_mode: gpio10_default {
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default_mux {
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function = "gpio";
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groups = "gpio10_d_1";
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};
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default_cfg {
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pins = "GPIO10_U17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio11 {
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gpio11_default_mode: gpio11_default {
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default_mux {
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function = "gpio";
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groups = "gpio11_d_1";
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};
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default_cfg {
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pins = "GPIO11_AA18";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio12 {
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gpio12_default_mode: gpio12_default {
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default_mux {
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function = "gpio";
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groups = "gpio12_d_1";
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};
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default_cfg {
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pins = "GPIO12_U16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio13 {
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gpio13_default_mode: gpio13_default {
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default_mux {
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function = "gpio";
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groups = "gpio13_d_1";
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};
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default_cfg {
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pins = "GPIO13_W17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio16 {
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gpio16_default_mode: gpio16_default {
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default_mux {
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function = "gpio";
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groups = "gpio16_a_1";
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};
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default_cfg {
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pins = "GPIO16_F15";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio24 {
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gpio24_default_mode: gpio24_default {
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default_mux {
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function = "gpio";
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groups = "gpio24_a_1";
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};
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default_cfg {
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pins = "GPIO24_T14";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio25 {
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gpio25_default_mode: gpio25_default {
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default_mux {
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function = "gpio";
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groups = "gpio25_a_1";
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};
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default_cfg {
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pins = "GPIO25_R16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio36 {
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gpio36_default_mode: gpio36_default {
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default_mux {
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function = "gpio";
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groups = "gpio36_a_1";
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};
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default_cfg {
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pins = "GPIO36_A17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio37 {
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gpio37_default_mode: gpio37_default {
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default_mux {
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function = "gpio";
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groups = "gpio37_a_1";
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};
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default_cfg {
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pins = "GPIO37_E15";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio38 {
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gpio38_default_mode: gpio38_default {
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default_mux {
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function = "gpio";
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groups = "gpio38_a_1";
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};
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default_cfg {
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pins = "GPIO38_C17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio39 {
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gpio39_default_mode: gpio39_default {
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default_mux {
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function = "gpio";
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groups = "gpio39_a_1";
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};
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default_cfg {
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pins = "GPIO39_E16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio42 {
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gpio42_default_mode: gpio42_default {
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default_mux {
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function = "gpio";
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groups = "gpio42_a_1";
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};
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default_cfg {
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pins = "GPIO42_U2";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/*
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* Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW
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*/
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gpio26 {
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gpio26_default_mode: gpio26_default {
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default_mux {
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function = "gpio";
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groups = "gpio26_d_1";
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};
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default_cfg {
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pins = "GPIO26_M16";
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output-low;
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};
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};
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};
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gpio35 {
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gpio35_default_mode: gpio35_default {
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default_mux {
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function = "gpio";
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groups = "gpio35_d_1";
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};
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default_cfg {
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pins = "GPIO35_W15";
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output-low;
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};
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};
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};
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/*
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* This sets up the YCBCR connector pins, i.e. analog video out.
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* Set as input with no bias.
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*/
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ycbcr {
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ycbcr_default_mode: ycbcr_default {
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default_mux {
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function = "ycbcr";
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groups = "ycbcr0123_d_1";
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};
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default_cfg {
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pins = "GPIO6_Y18",
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"GPIO7_AA20",
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"GPIO8_W18",
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"GPIO9_AA19";
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input-enable;
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bias-disable;
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};
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};
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};
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/* This sets up the PWM pins 14 and 15 */
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pwm {
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pwm_default_mode: pwm_default {
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default_mux {
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function = "pwmout";
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groups = "pwmout1_d_1", "pwmout2_d_1";
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};
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default_cfg {
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pins = "GPIO14_F14",
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"GPIO15_B17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* This sets up audio interface 1 */
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adi1 {
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adi1_default_mode: adi1_default {
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default_mux {
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function = "adi1";
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groups = "adi1_d_1";
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};
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default_cfg {
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pins = "GPIO17_P5",
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"GPIO18_R5",
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"GPIO19_U5",
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"GPIO20_T5";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* This sets up the USB UICC pins */
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usbuicc {
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usbuicc_default_mode: usbuicc_default {
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default_mux {
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function = "usbuicc";
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groups = "usbuicc_d_1";
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};
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default_cfg {
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pins = "GPIO21_H19",
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"GPIO22_G20",
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"GPIO23_G19";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* This sets up the microphone pins */
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dmic {
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dmic_default_mode: dmic_default {
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default_mux {
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function = "dmic";
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groups = "dmic12_d_1",
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"dmic34_d_1",
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"dmic56_d_1";
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};
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default_cfg {
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pins = "GPIO27_J6",
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"GPIO28_K6",
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"GPIO29_G6",
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"GPIO30_H6",
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"GPIO31_F5",
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"GPIO32_G5";
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input-enable;
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bias-pull-down;
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};
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};
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};
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extcpena {
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extcpena_default_mode: extcpena_default {
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default_mux {
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function = "extcpena";
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groups = "extcpena_d_1";
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};
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default_cfg {
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pins = "GPIO34_R17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* Modem I2C setup (SCL and SDA pins) */
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modsclsda {
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modsclsda_default_mode: modsclsda_default {
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default_mux {
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function = "modsclsda";
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groups = "modsclsda_d_1";
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};
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default_cfg {
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pins = "GPIO40_T19",
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"GPIO41_U19";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/*
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* Clock output pins associated with regulators.
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*/
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sysclkreq2 {
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sysclkreq2_default_mode: sysclkreq2_default {
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default_mux {
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function = "sysclkreq";
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groups = "sysclkreq2_d_1";
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};
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default_cfg {
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pins = "GPIO1_T10";
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input-enable;
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bias-disable;
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};
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};
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sysclkreq2_sleep_mode: sysclkreq2_sleep {
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default_mux {
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function = "gpio";
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groups = "gpio1_a_1";
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};
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default_cfg {
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pins = "GPIO1_T10";
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input-enable;
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bias-pull-down;
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};
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};
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};
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sysclkreq4 {
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sysclkreq4_default_mode: sysclkreq4_default {
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default_mux {
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function = "sysclkreq";
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groups = "sysclkreq4_d_1";
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};
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default_cfg {
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pins = "GPIO3_U9";
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input-enable;
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bias-disable;
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};
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};
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sysclkreq4_sleep_mode: sysclkreq4_sleep {
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default_mux {
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function = "gpio";
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groups = "gpio3_a_1";
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};
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default_cfg {
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pins = "GPIO3_U9";
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input-enable;
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bias-pull-down;
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};
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};
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};
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};
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};
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};
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};
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};
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