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13aec8e419
With the GPMC warnings now enabled, I noticed the LAN9220 timings can overflow the GPMC registers with 200MHz L3 speed. Earlier we were just skipping the bad timings and would continue with the bootloader timings. Now we no longer allow to continue with bad timings as we have the timings in the .dts files. We could start using the GPMC clock divider, but let's instead use the u-boot timings that are known to be working and a bit faster. These are basically the u-boot NET_GPMC_CONFIG[1-6] defines deciphered. Except that we don't set gpmc,burst-length as that's only partially configured and does not seem to work if fully enabled. [tony@atomide.com: updated to remove gpmc,burst-length] Signed-off-by: Tony Lindgren <tony@atomide.com>
55 lines
1.3 KiB
Plaintext
55 lines
1.3 KiB
Plaintext
/*
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* Common file for GPMC connected smsc911x on omaps
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*
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* Note that the board specifc DTS file needs to specify
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* ranges, pinctrl, reg, interrupt parent and interrupts.
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*/
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/ {
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vddvario: regulator-vddvario {
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compatible = "regulator-fixed";
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regulator-name = "vddvario";
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regulator-always-on;
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};
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vdd33a: regulator-vdd33a {
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compatible = "regulator-fixed";
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regulator-name = "vdd33a";
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regulator-always-on;
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};
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};
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&gpmc {
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ethernet@gpmc {
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compatible = "smsc,lan9221", "smsc,lan9115";
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bank-width = <2>;
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gpmc,device-width = <1>;
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gpmc,cycle2cycle-samecsen = <1>;
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gpmc,cycle2cycle-diffcsen = <1>;
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gpmc,cs-on-ns = <5>;
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gpmc,cs-rd-off-ns = <150>;
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gpmc,cs-wr-off-ns = <150>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <15>;
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gpmc,adv-wr-off-ns = <40>;
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gpmc,oe-on-ns = <45>;
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gpmc,oe-off-ns = <140>;
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gpmc,we-on-ns = <45>;
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gpmc,we-off-ns = <140>;
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gpmc,rd-cycle-ns = <155>;
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gpmc,wr-cycle-ns = <155>;
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gpmc,access-ns = <120>;
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gpmc,page-burst-access-ns = <20>;
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gpmc,bus-turnaround-ns = <75>;
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gpmc,cycle2cycle-delay-ns = <75>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wr-data-mux-bus-ns = <0>;
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gpmc,wr-access-ns = <0>;
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vddvario-supply = <&vddvario>;
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vdd33a-supply = <&vdd33a>;
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reg-io-width = <4>;
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smsc,save-mac-address;
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};
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};
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