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0555a6be06
Removale of skeleton.dtsi allows us also to fix the following warning from the dts compiler: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name by adding proper unit addresses to the memory nodes. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
222 lines
3.5 KiB
Plaintext
222 lines
3.5 KiB
Plaintext
/*
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* CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
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*
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* Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
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*
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* This code is released using a dual license strategy: BSD/GPL
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* You can choose the licence that better fits your requirements.
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*
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* Released under the terms of 3-clause BSD License
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* Released under the terms of GNU General Public License Version 2.0
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*/
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/dts-v1/;
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#include "lpc18xx.dtsi"
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#include "lpc4357.dtsi"
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#include "dt-bindings/gpio/gpio.h"
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/ {
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model = "CIAA NXP LPC4337";
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compatible = "ciaa,lpc4337", "nxp,lpc4337", "nxp,lpc4350";
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aliases {
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serial0 = &uart2;
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serial1 = &uart3;
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};
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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stdout-path = &uart2;
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};
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memory@28000000 {
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device_type = "memory";
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reg = <0x28000000 0x0800000>; /* 8 MB */
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};
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};
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&pinctrl {
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enet_rmii_pins: enet-rmii-pins {
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enet_rmii_rxd_cfg {
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pins = "p1_15", "p0_0";
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function = "enet";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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enet_rmii_txd_cfg {
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pins = "p1_18", "p1_20";
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function = "enet";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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enet_rmii_rx_dv_cfg {
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pins = "p1_16";
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function = "enet";
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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enet_rmii_tx_en_cfg {
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pins = "p0_1";
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function = "enet";
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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enet_ref_clk_cfg {
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pins = "p1_19";
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function = "enet";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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enet_mdio_cfg {
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pins = "p1_17";
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function = "enet";
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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enet_mdc_cfg {
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pins = "p7_7";
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function = "enet";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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};
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i2c0_pins: i2c0-pins {
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i2c0_pins_cfg {
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pins = "i2c0_scl", "i2c0_sda";
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function = "i2c0";
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input-enable;
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};
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};
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ssp_pins: ssp-pins {
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ssp1_cs {
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pins = "p6_7";
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function = "gpio";
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bias-pull-up;
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bias-disable;
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};
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ssp1_miso_mosi {
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pins = "p1_3", "p1_4";
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function = "ssp1";
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slew-rate = <1>;
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bias-pull-down;
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input-enable;
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input-schmitt-disable;
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};
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ssp1_sck {
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pins = "pf_4";
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function = "ssp1";
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slew-rate = <1>;
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bias-disable;
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};
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};
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uart2_pins: uart2-pins {
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uart2_rx_cfg {
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pins = "p7_2";
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function = "uart2";
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bias-disable;
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input-enable;
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};
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uart2_tx_cfg {
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pins = "p7_1";
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function = "uart2";
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bias-disable;
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};
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};
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uart3_pins: uart3-pins {
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uart3_rx_cfg {
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pins = "p2_4";
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function = "uart3";
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bias-disable;
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input-enable;
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};
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uart3_tx_cfg {
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pins = "p2_3";
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function = "uart3";
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bias-disable;
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};
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};
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};
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&enet_tx_clk {
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clock-frequency = <50000000>;
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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clock-frequency = <400000>;
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eeprom@50 {
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compatible = "microchip,24c512";
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reg = <0x50>;
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};
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eeprom@51 {
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compatible = "microchip,24c02";
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reg = <0x51>;
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};
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eeprom@54 {
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compatible = "microchip,24c512";
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reg = <0x54>;
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};
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};
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&mac {
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status = "okay";
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&enet_rmii_pins>;
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};
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&sct_pwm {
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status = "okay";
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};
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&ssp1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&ssp_pins>;
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cs-gpios = <&gpio LPC_GPIO(5,15) GPIO_ACTIVE_HIGH>;
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num-cs = <1>;
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};
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&uart2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&uart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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};
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