mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-05 18:14:07 +08:00
9f68e3655a
uapi: - dma-buf heaps added (and fixed) - command line add support for panel oreientation - command line allow overriding penguin count drm: - mipi dsi definition updates - lockdep annotations for dma_resv - remove dma-buf kmap/kunmap support - constify fb_ops in all fbdev drivers - MST fix for daisy chained hotplug- - CTA-861-G modes with VIC >= 193 added - fix drm_panel_of_backlight export - LVDS decoder support - more device based logging support - scanline alighment for dumb buffers - MST DSC helpers scheduler: - documentation fixes - job distribution improvements panel: - Logic PD type 28 panel support - Jimax8729d MIPI-DSI - igenic JZ4770 - generic DSI devicetree bindings - sony acx424AKP panel - Leadtek LTK500HD1829 - xinpeng XPP055C272 - AUO B116XAK01 - GiantPlus GPM940B0 - BOE NV140FHM-N49 - Satoz SAT050AT40H12R2 - Sharp LS020B1DD01D panels. ttm: - use blocking WW lock i915: - hw/uapi state separation - Lock annotation improvements - selftest improvements - ICL/TGL DSI VDSC support - VBT parsing improvments - Display refactoring - DSI updates + fixes - HDCP 2.2 for CFL - CML PCI ID fixes - GLK+ fbc fix - PSR fixes - GEN/GT refactor improvments - DP MST fixes - switch context id alloc to xarray - workaround updates - LMEM debugfs support - tiled monitor fixes - ICL+ clock gating programming removed - DP MST disable sequence fixed - LMEM discontiguous object maps - prefaulting for discontiguous objects - use LMEM for dumb buffers if possible - add LMEM mmap support amdgpu: - enable sync object timelines for vulkan - MST atomic routines - enable MST DSC support - add DMCUB display microengine support - DC OEM i2c support - Renoir DC fixes - Initial HDCP 2.x support - BACO support for Arcturus - Use BACO for runtime PM power save - gfxoff on navi10 - gfx10 golden updates and fixes - DCN support on POWER - GFXOFF for raven1 refresh - MM engine idle handlers cleanup - 10bpc EDP panel fixes - renoir watermark fixes - SR-IOV fixes - Arcturus VCN fixes - GDDR6 training fixes - freesync fixes - Pollock support amdkfd: - unify more codepath with amdgpu - use KIQ to setup HIQ rather than MMIO radeon: - fix vma fault handler race - PPC DMA fix - register check fixes for r100/r200 nouveau: - mmap_sem vs dma_resv fix - rewrite the ACR secure boot code for Turing - TU10x graphics engine support (TU11x pending) - Page kind mapping for turing - 10-bit LUT support - GP10B Tegra fixes - HD audio regression fix hisilicon/hibmc: - use generic fbdev code and helpers rockchip: - dsi/px30 support virtio: - fb damage support - static some functions vc4: - use dma_resv lock wrappers msm: - use dma_resv lock wrappers - sc7180 display + DSI support - a618 support - UBWC support improvements vmwgfx: - updates + new logging uapi exynos: - enable/disable callback cleanups etnaviv: - use dma_resv lock wrappers atmel-hlcdc: - clock fixes mediatek: - cmdq support - non-smooth cursor fixes - ctm property support sun4i: - suspend support - A64 mipi dsi support rcar-du: - Color management module support - LVDS encoder dual-link support - R8A77980 support analogic: - add support for an6345 ast: - atomic modeset support - primary plane garbage fix arcgpu: - fixes for fourcc handling tegra: - minor fixes and improvments mcde: - vblank support meson: - OSD1 plane AFBC commit gma500: - add pageflip support - reomve global drm_dev komeda: - tweak debugfs output - d32 support - runtime PM suppotr udl: - use generic shmem helpers - cleanup and fixes -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJeMm6RAAoJEAx081l5xIa+vN8P/0j4jEOv+KIinAhoH+LG3EpD m2TUuu5OQIoBrcCoWOgFBk3wqYpw6PdMBdkXh+5sE5lfeBynp8oC3Bin+QsHJE05 eGBpZtHe+70MQb0Eha+Aic0hchvBKzRnq6i0MYSIHn6afs76dLmF8knTjycxrvV5 Xu1Z3WDmjzqgWF9ja5JCD6fby11seP5RrwObYKVikO35QQyJJwGSGKgu5rq/pByK /n0PCnCOINuL0Lz6J9qexdh/0/XYFQilRC31GJNlKbDSFuECF0GOEzEE/xUBW/pI dLh2YwIIygm18Gar9PgvMwXJn3BfzQ0qEJsf+HlQeNw9iLgbHpp2AsTxHTE87OGe R/y85taW3jGjPsNOKZOeLpvg/Ro8l8ZipLApvDCG2O22DThg/cd6NDjZxl1FJfRH acDG/JdgPo5MbdRAH/cM1WuFS9gEM+0BeSQ5gCjtPakF+X4Vz+ABFDLMRJoaejkJ q8DG32TQXELQx0RMghsqK7YCWGfl+2alA1u9w6TgJh9Rq4iVckvpDeqAZnK1Adkc 87g957Tl0n6FA4wJj/t5jrceiLRMJAm/rBK+R3GZNfWrgx4bHbCmb4fZDZsrFzph nbAjNJ5kOchrFCaRR47ULby6+Q14MAFbkWq4Crfu4YDdzUkTPpep6pi2GIe8w0rV P0hdYOYJf6LUda0utuQX =oFrI -----END PGP SIGNATURE----- Merge tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Davbe Airlie: "This is the main pull request for graphics for 5.6. Usual selection of changes all over. I've got one outstanding vmwgfx pull that touches mm so kept it separate until after all of this lands. I'll try and get it to you soon after this, but it might be early next week (nothing wrong with code, just my schedule is messy) This also hits a lot of fbdev drivers with some cleanups. Other notables: - vulkan timeline semaphore support added to syncobjs - nouveau turing secureboot/graphics support - Displayport MST display stream compression support Detailed summary: uapi: - dma-buf heaps added (and fixed) - command line add support for panel oreientation - command line allow overriding penguin count drm: - mipi dsi definition updates - lockdep annotations for dma_resv - remove dma-buf kmap/kunmap support - constify fb_ops in all fbdev drivers - MST fix for daisy chained hotplug- - CTA-861-G modes with VIC >= 193 added - fix drm_panel_of_backlight export - LVDS decoder support - more device based logging support - scanline alighment for dumb buffers - MST DSC helpers scheduler: - documentation fixes - job distribution improvements panel: - Logic PD type 28 panel support - Jimax8729d MIPI-DSI - igenic JZ4770 - generic DSI devicetree bindings - sony acx424AKP panel - Leadtek LTK500HD1829 - xinpeng XPP055C272 - AUO B116XAK01 - GiantPlus GPM940B0 - BOE NV140FHM-N49 - Satoz SAT050AT40H12R2 - Sharp LS020B1DD01D panels. ttm: - use blocking WW lock i915: - hw/uapi state separation - Lock annotation improvements - selftest improvements - ICL/TGL DSI VDSC support - VBT parsing improvments - Display refactoring - DSI updates + fixes - HDCP 2.2 for CFL - CML PCI ID fixes - GLK+ fbc fix - PSR fixes - GEN/GT refactor improvments - DP MST fixes - switch context id alloc to xarray - workaround updates - LMEM debugfs support - tiled monitor fixes - ICL+ clock gating programming removed - DP MST disable sequence fixed - LMEM discontiguous object maps - prefaulting for discontiguous objects - use LMEM for dumb buffers if possible - add LMEM mmap support amdgpu: - enable sync object timelines for vulkan - MST atomic routines - enable MST DSC support - add DMCUB display microengine support - DC OEM i2c support - Renoir DC fixes - Initial HDCP 2.x support - BACO support for Arcturus - Use BACO for runtime PM power save - gfxoff on navi10 - gfx10 golden updates and fixes - DCN support on POWER - GFXOFF for raven1 refresh - MM engine idle handlers cleanup - 10bpc EDP panel fixes - renoir watermark fixes - SR-IOV fixes - Arcturus VCN fixes - GDDR6 training fixes - freesync fixes - Pollock support amdkfd: - unify more codepath with amdgpu - use KIQ to setup HIQ rather than MMIO radeon: - fix vma fault handler race - PPC DMA fix - register check fixes for r100/r200 nouveau: - mmap_sem vs dma_resv fix - rewrite the ACR secure boot code for Turing - TU10x graphics engine support (TU11x pending) - Page kind mapping for turing - 10-bit LUT support - GP10B Tegra fixes - HD audio regression fix hisilicon/hibmc: - use generic fbdev code and helpers rockchip: - dsi/px30 support virtio: - fb damage support - static some functions vc4: - use dma_resv lock wrappers msm: - use dma_resv lock wrappers - sc7180 display + DSI support - a618 support - UBWC support improvements vmwgfx: - updates + new logging uapi exynos: - enable/disable callback cleanups etnaviv: - use dma_resv lock wrappers atmel-hlcdc: - clock fixes mediatek: - cmdq support - non-smooth cursor fixes - ctm property support sun4i: - suspend support - A64 mipi dsi support rcar-du: - Color management module support - LVDS encoder dual-link support - R8A77980 support analogic: - add support for an6345 ast: - atomic modeset support - primary plane garbage fix arcgpu: - fixes for fourcc handling tegra: - minor fixes and improvments mcde: - vblank support meson: - OSD1 plane AFBC commit gma500: - add pageflip support - reomve global drm_dev komeda: - tweak debugfs output - d32 support - runtime PM suppotr udl: - use generic shmem helpers - cleanup and fixes" * tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm: (1998 commits) drm/nouveau/fb/gp102-: allow module to load even when scrubber binary is missing drm/nouveau/acr: return error when registering LSF if ACR not supported drm/nouveau/disp/gv100-: not all channel types support reporting error codes drm/nouveau/disp/nv50-: prevent oops when no channel method map provided drm/nouveau: support synchronous pushbuf submission drm/nouveau: signal pending fences when channel has been killed drm/nouveau: reject attempts to submit to dead channels drm/nouveau: zero vma pointer even if we only unreference it rather than free drm/nouveau: Add HD-audio component notifier support drm/nouveau: fix build error without CONFIG_IOMMU_API drm/nouveau/kms/nv04: remove set but not used variable 'width' drm/nouveau/kms/nv50: remove set but not unused variable 'nv_connector' drm/nouveau/mmu: fix comptag memory leak drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbc drm/nouveau/pmu/gm20b,gp10b: Fix Falcon bootstrapping drm/exynos: Rename Exynos to lowercase drm/exynos: change callback names drm/mst: Don't do atomic checks over disabled managers drm/amdgpu: add the lost mutex_init back drm/amd/display: skip opp blank or unblank if test pattern enabled ...
588 lines
14 KiB
C
588 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* SH7760/SH7763 LCDC Framebuffer driver.
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*
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* (c) 2006-2008 MSC Vertriebsges.m.b.H.,
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* Manuel Lauss <mano@roarinelk.homelinux.net>
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* (c) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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*
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* PLEASE HAVE A LOOK AT Documentation/fb/sh7760fb.rst!
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*
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* Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de>
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* for his original source and testing!
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*
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* sh7760_setcolreg get from drivers/video/sh_mobile_lcdcfb.c
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*/
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/fb.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <asm/sh7760fb.h>
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struct sh7760fb_par {
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void __iomem *base;
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int irq;
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struct sh7760fb_platdata *pd; /* display information */
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dma_addr_t fbdma; /* physical address */
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int rot; /* rotation enabled? */
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u32 pseudo_palette[16];
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struct platform_device *dev;
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struct resource *ioarea;
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struct completion vsync; /* vsync irq event */
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};
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static irqreturn_t sh7760fb_irq(int irq, void *data)
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{
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struct completion *c = data;
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complete(c);
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return IRQ_HANDLED;
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}
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/* wait_for_lps - wait until power supply has reached a certain state. */
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static int wait_for_lps(struct sh7760fb_par *par, int val)
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{
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int i = 100;
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while (--i && ((ioread16(par->base + LDPMMR) & 3) != val))
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msleep(1);
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if (i <= 0)
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return -ETIMEDOUT;
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return 0;
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}
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/* en/disable the LCDC */
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static int sh7760fb_blank(int blank, struct fb_info *info)
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{
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struct sh7760fb_par *par = info->par;
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struct sh7760fb_platdata *pd = par->pd;
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unsigned short cntr = ioread16(par->base + LDCNTR);
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unsigned short intr = ioread16(par->base + LDINTR);
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int lps;
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if (blank == FB_BLANK_UNBLANK) {
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intr |= VINT_START;
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cntr = LDCNTR_DON2 | LDCNTR_DON;
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lps = 3;
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} else {
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intr &= ~VINT_START;
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cntr = LDCNTR_DON2;
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lps = 0;
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}
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if (pd->blank)
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pd->blank(blank);
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iowrite16(intr, par->base + LDINTR);
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iowrite16(cntr, par->base + LDCNTR);
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return wait_for_lps(par, lps);
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}
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static int sh7760_setcolreg (u_int regno,
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u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info)
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{
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u32 *palette = info->pseudo_palette;
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if (regno >= 16)
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return -EINVAL;
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/* only FB_VISUAL_TRUECOLOR supported */
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red >>= 16 - info->var.red.length;
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green >>= 16 - info->var.green.length;
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blue >>= 16 - info->var.blue.length;
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transp >>= 16 - info->var.transp.length;
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palette[regno] = (red << info->var.red.offset) |
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(green << info->var.green.offset) |
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(blue << info->var.blue.offset) |
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(transp << info->var.transp.offset);
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return 0;
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}
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static int sh7760fb_get_color_info(struct device *dev,
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u16 lddfr, int *bpp, int *gray)
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{
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int lbpp, lgray;
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lgray = lbpp = 0;
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switch (lddfr & LDDFR_COLOR_MASK) {
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case LDDFR_1BPP_MONO:
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lgray = 1;
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lbpp = 1;
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break;
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case LDDFR_2BPP_MONO:
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lgray = 1;
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lbpp = 2;
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break;
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case LDDFR_4BPP_MONO:
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lgray = 1;
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case LDDFR_4BPP:
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lbpp = 4;
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break;
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case LDDFR_6BPP_MONO:
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lgray = 1;
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case LDDFR_8BPP:
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lbpp = 8;
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break;
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case LDDFR_16BPP_RGB555:
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case LDDFR_16BPP_RGB565:
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lbpp = 16;
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lgray = 0;
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break;
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default:
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dev_dbg(dev, "unsupported LDDFR bit depth.\n");
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return -EINVAL;
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}
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if (bpp)
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*bpp = lbpp;
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if (gray)
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*gray = lgray;
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return 0;
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}
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static int sh7760fb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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struct fb_fix_screeninfo *fix = &info->fix;
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struct sh7760fb_par *par = info->par;
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int ret, bpp;
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/* get color info from register value */
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ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, NULL);
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if (ret)
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return ret;
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var->bits_per_pixel = bpp;
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if ((var->grayscale) && (var->bits_per_pixel == 1))
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fix->visual = FB_VISUAL_MONO10;
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else if (var->bits_per_pixel >= 15)
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fix->visual = FB_VISUAL_TRUECOLOR;
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else
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fix->visual = FB_VISUAL_PSEUDOCOLOR;
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/* TODO: add some more validation here */
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return 0;
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}
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/*
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* sh7760fb_set_par - set videomode.
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*
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* NOTE: The rotation, grayscale and DSTN codepaths are
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* totally untested!
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*/
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static int sh7760fb_set_par(struct fb_info *info)
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{
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struct sh7760fb_par *par = info->par;
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struct fb_videomode *vm = par->pd->def_mode;
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unsigned long sbase, dstn_off, ldsarl, stride;
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unsigned short hsynp, hsynw, htcn, hdcn;
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unsigned short vsynp, vsynw, vtln, vdln;
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unsigned short lddfr, ldmtr;
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int ret, bpp, gray;
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par->rot = par->pd->rotate;
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/* rotate only works with xres <= 320 */
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if (par->rot && (vm->xres > 320)) {
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dev_dbg(info->dev, "rotation disabled due to display size\n");
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par->rot = 0;
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}
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/* calculate LCDC reg vals from display parameters */
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hsynp = vm->right_margin + vm->xres;
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hsynw = vm->hsync_len;
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htcn = vm->left_margin + hsynp + hsynw;
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hdcn = vm->xres;
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vsynp = vm->lower_margin + vm->yres;
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vsynw = vm->vsync_len;
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vtln = vm->upper_margin + vsynp + vsynw;
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vdln = vm->yres;
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/* get color info from register value */
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ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, &gray);
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if (ret)
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return ret;
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dev_dbg(info->dev, "%dx%d %dbpp %s (orientation %s)\n", hdcn,
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vdln, bpp, gray ? "grayscale" : "color",
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par->rot ? "rotated" : "normal");
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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lddfr = par->pd->lddfr | (1 << 8);
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#else
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lddfr = par->pd->lddfr & ~(1 << 8);
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#endif
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ldmtr = par->pd->ldmtr;
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if (!(vm->sync & FB_SYNC_HOR_HIGH_ACT))
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ldmtr |= LDMTR_CL1POL;
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if (!(vm->sync & FB_SYNC_VERT_HIGH_ACT))
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ldmtr |= LDMTR_FLMPOL;
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/* shut down LCDC before changing display parameters */
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sh7760fb_blank(FB_BLANK_POWERDOWN, info);
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iowrite16(par->pd->ldickr, par->base + LDICKR); /* pixclock */
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iowrite16(ldmtr, par->base + LDMTR); /* polarities */
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iowrite16(lddfr, par->base + LDDFR); /* color/depth */
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iowrite16((par->rot ? 1 << 13 : 0), par->base + LDSMR); /* rotate */
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iowrite16(par->pd->ldpmmr, par->base + LDPMMR); /* Power Management */
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iowrite16(par->pd->ldpspr, par->base + LDPSPR); /* Power Supply Ctrl */
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/* display resolution */
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iowrite16(((htcn >> 3) - 1) | (((hdcn >> 3) - 1) << 8),
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par->base + LDHCNR);
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iowrite16(vdln - 1, par->base + LDVDLNR);
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iowrite16(vtln - 1, par->base + LDVTLNR);
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/* h/v sync signals */
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iowrite16((vsynp - 1) | ((vsynw - 1) << 12), par->base + LDVSYNR);
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iowrite16(((hsynp >> 3) - 1) | (((hsynw >> 3) - 1) << 12),
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par->base + LDHSYNR);
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/* AC modulation sig */
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iowrite16(par->pd->ldaclnr, par->base + LDACLNR);
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stride = (par->rot) ? vtln : hdcn;
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if (!gray)
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stride *= (bpp + 7) >> 3;
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else {
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if (bpp == 1)
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stride >>= 3;
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else if (bpp == 2)
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stride >>= 2;
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else if (bpp == 4)
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stride >>= 1;
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/* 6 bpp == 8 bpp */
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}
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/* if rotated, stride must be power of 2 */
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if (par->rot) {
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unsigned long bit = 1 << 31;
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while (bit) {
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if (stride & bit)
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break;
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bit >>= 1;
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}
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if (stride & ~bit)
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stride = bit << 1; /* not P-o-2, round up */
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}
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iowrite16(stride, par->base + LDLAOR);
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/* set display mem start address */
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sbase = (unsigned long)par->fbdma;
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if (par->rot)
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sbase += (hdcn - 1) * stride;
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iowrite32(sbase, par->base + LDSARU);
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/*
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* for DSTN need to set address for lower half.
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* I (mlau) don't know which address to set it to,
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* so I guessed at (stride * yres/2).
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*/
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if (((ldmtr & 0x003f) >= LDMTR_DSTN_MONO_8) &&
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((ldmtr & 0x003f) <= LDMTR_DSTN_COLOR_16)) {
|
|
|
|
dev_dbg(info->dev, " ***** DSTN untested! *****\n");
|
|
|
|
dstn_off = stride;
|
|
if (par->rot)
|
|
dstn_off *= hdcn >> 1;
|
|
else
|
|
dstn_off *= vdln >> 1;
|
|
|
|
ldsarl = sbase + dstn_off;
|
|
} else
|
|
ldsarl = 0;
|
|
|
|
iowrite32(ldsarl, par->base + LDSARL); /* mem for lower half of DSTN */
|
|
|
|
info->fix.line_length = stride;
|
|
|
|
sh7760fb_check_var(&info->var, info);
|
|
|
|
sh7760fb_blank(FB_BLANK_UNBLANK, info); /* panel on! */
|
|
|
|
dev_dbg(info->dev, "hdcn : %6d htcn : %6d\n", hdcn, htcn);
|
|
dev_dbg(info->dev, "hsynw : %6d hsynp : %6d\n", hsynw, hsynp);
|
|
dev_dbg(info->dev, "vdln : %6d vtln : %6d\n", vdln, vtln);
|
|
dev_dbg(info->dev, "vsynw : %6d vsynp : %6d\n", vsynw, vsynp);
|
|
dev_dbg(info->dev, "clksrc: %6d clkdiv: %6d\n",
|
|
(par->pd->ldickr >> 12) & 3, par->pd->ldickr & 0x1f);
|
|
dev_dbg(info->dev, "ldpmmr: 0x%04x ldpspr: 0x%04x\n", par->pd->ldpmmr,
|
|
par->pd->ldpspr);
|
|
dev_dbg(info->dev, "ldmtr : 0x%04x lddfr : 0x%04x\n", ldmtr, lddfr);
|
|
dev_dbg(info->dev, "ldlaor: %ld\n", stride);
|
|
dev_dbg(info->dev, "ldsaru: 0x%08lx ldsarl: 0x%08lx\n", sbase, ldsarl);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct fb_ops sh7760fb_ops = {
|
|
.owner = THIS_MODULE,
|
|
.fb_blank = sh7760fb_blank,
|
|
.fb_check_var = sh7760fb_check_var,
|
|
.fb_setcolreg = sh7760_setcolreg,
|
|
.fb_set_par = sh7760fb_set_par,
|
|
.fb_fillrect = cfb_fillrect,
|
|
.fb_copyarea = cfb_copyarea,
|
|
.fb_imageblit = cfb_imageblit,
|
|
};
|
|
|
|
static void sh7760fb_free_mem(struct fb_info *info)
|
|
{
|
|
struct sh7760fb_par *par = info->par;
|
|
|
|
if (!info->screen_base)
|
|
return;
|
|
|
|
dma_free_coherent(info->dev, info->screen_size,
|
|
info->screen_base, par->fbdma);
|
|
|
|
par->fbdma = 0;
|
|
info->screen_base = NULL;
|
|
info->screen_size = 0;
|
|
}
|
|
|
|
/* allocate the framebuffer memory. This memory must be in Area3,
|
|
* (dictated by the DMA engine) and contiguous, at a 512 byte boundary.
|
|
*/
|
|
static int sh7760fb_alloc_mem(struct fb_info *info)
|
|
{
|
|
struct sh7760fb_par *par = info->par;
|
|
void *fbmem;
|
|
unsigned long vram;
|
|
int ret, bpp;
|
|
|
|
if (info->screen_base)
|
|
return 0;
|
|
|
|
/* get color info from register value */
|
|
ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, NULL);
|
|
if (ret) {
|
|
printk(KERN_ERR "colinfo\n");
|
|
return ret;
|
|
}
|
|
|
|
/* min VRAM: xres_min = 16, yres_min = 1, bpp = 1: 2byte -> 1 page
|
|
max VRAM: xres_max = 1024, yres_max = 1024, bpp = 16: 2MB */
|
|
|
|
vram = info->var.xres * info->var.yres;
|
|
if (info->var.grayscale) {
|
|
if (bpp == 1)
|
|
vram >>= 3;
|
|
else if (bpp == 2)
|
|
vram >>= 2;
|
|
else if (bpp == 4)
|
|
vram >>= 1;
|
|
} else if (bpp > 8)
|
|
vram *= 2;
|
|
if ((vram < 1) || (vram > 1024 * 2048)) {
|
|
dev_dbg(info->dev, "too much VRAM required. Check settings\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (vram < PAGE_SIZE)
|
|
vram = PAGE_SIZE;
|
|
|
|
fbmem = dma_alloc_coherent(info->dev, vram, &par->fbdma, GFP_KERNEL);
|
|
|
|
if (!fbmem)
|
|
return -ENOMEM;
|
|
|
|
if ((par->fbdma & SH7760FB_DMA_MASK) != SH7760FB_DMA_MASK) {
|
|
sh7760fb_free_mem(info);
|
|
dev_err(info->dev, "kernel gave me memory at 0x%08lx, which is"
|
|
"unusable for the LCDC\n", (unsigned long)par->fbdma);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
info->screen_base = fbmem;
|
|
info->screen_size = vram;
|
|
info->fix.smem_start = (unsigned long)info->screen_base;
|
|
info->fix.smem_len = info->screen_size;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sh7760fb_probe(struct platform_device *pdev)
|
|
{
|
|
struct fb_info *info;
|
|
struct resource *res;
|
|
struct sh7760fb_par *par;
|
|
int ret;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (unlikely(res == NULL)) {
|
|
dev_err(&pdev->dev, "invalid resource\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
info = framebuffer_alloc(sizeof(struct sh7760fb_par), &pdev->dev);
|
|
if (!info)
|
|
return -ENOMEM;
|
|
|
|
par = info->par;
|
|
par->dev = pdev;
|
|
|
|
par->pd = pdev->dev.platform_data;
|
|
if (!par->pd) {
|
|
dev_dbg(info->dev, "no display setup data!\n");
|
|
ret = -ENODEV;
|
|
goto out_fb;
|
|
}
|
|
|
|
par->ioarea = request_mem_region(res->start,
|
|
resource_size(res), pdev->name);
|
|
if (!par->ioarea) {
|
|
dev_err(&pdev->dev, "mmio area busy\n");
|
|
ret = -EBUSY;
|
|
goto out_fb;
|
|
}
|
|
|
|
par->base = ioremap(res->start, resource_size(res));
|
|
if (!par->base) {
|
|
dev_err(&pdev->dev, "cannot remap\n");
|
|
ret = -ENODEV;
|
|
goto out_res;
|
|
}
|
|
|
|
iowrite16(0, par->base + LDINTR); /* disable vsync irq */
|
|
par->irq = platform_get_irq(pdev, 0);
|
|
if (par->irq >= 0) {
|
|
ret = request_irq(par->irq, sh7760fb_irq, 0,
|
|
"sh7760-lcdc", &par->vsync);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "cannot grab IRQ\n");
|
|
par->irq = -ENXIO;
|
|
} else
|
|
disable_irq_nosync(par->irq);
|
|
}
|
|
|
|
fb_videomode_to_var(&info->var, par->pd->def_mode);
|
|
|
|
ret = sh7760fb_alloc_mem(info);
|
|
if (ret) {
|
|
dev_dbg(info->dev, "framebuffer memory allocation failed!\n");
|
|
goto out_unmap;
|
|
}
|
|
|
|
info->pseudo_palette = par->pseudo_palette;
|
|
|
|
/* fixup color register bitpositions. These are fixed by hardware */
|
|
info->var.red.offset = 11;
|
|
info->var.red.length = 5;
|
|
info->var.red.msb_right = 0;
|
|
|
|
info->var.green.offset = 5;
|
|
info->var.green.length = 6;
|
|
info->var.green.msb_right = 0;
|
|
|
|
info->var.blue.offset = 0;
|
|
info->var.blue.length = 5;
|
|
info->var.blue.msb_right = 0;
|
|
|
|
info->var.transp.offset = 0;
|
|
info->var.transp.length = 0;
|
|
info->var.transp.msb_right = 0;
|
|
|
|
strcpy(info->fix.id, "sh7760-lcdc");
|
|
|
|
/* set the DON2 bit now, before cmap allocation, as it will randomize
|
|
* palette memory.
|
|
*/
|
|
iowrite16(LDCNTR_DON2, par->base + LDCNTR);
|
|
info->fbops = &sh7760fb_ops;
|
|
|
|
ret = fb_alloc_cmap(&info->cmap, 256, 0);
|
|
if (ret) {
|
|
dev_dbg(info->dev, "Unable to allocate cmap memory\n");
|
|
goto out_mem;
|
|
}
|
|
|
|
ret = register_framebuffer(info);
|
|
if (ret < 0) {
|
|
dev_dbg(info->dev, "cannot register fb!\n");
|
|
goto out_cmap;
|
|
}
|
|
platform_set_drvdata(pdev, info);
|
|
|
|
printk(KERN_INFO "%s: memory at phys 0x%08lx-0x%08lx, size %ld KiB\n",
|
|
pdev->name,
|
|
(unsigned long)par->fbdma,
|
|
(unsigned long)(par->fbdma + info->screen_size - 1),
|
|
info->screen_size >> 10);
|
|
|
|
return 0;
|
|
|
|
out_cmap:
|
|
sh7760fb_blank(FB_BLANK_POWERDOWN, info);
|
|
fb_dealloc_cmap(&info->cmap);
|
|
out_mem:
|
|
sh7760fb_free_mem(info);
|
|
out_unmap:
|
|
if (par->irq >= 0)
|
|
free_irq(par->irq, &par->vsync);
|
|
iounmap(par->base);
|
|
out_res:
|
|
release_mem_region(res->start, resource_size(res));
|
|
out_fb:
|
|
framebuffer_release(info);
|
|
return ret;
|
|
}
|
|
|
|
static int sh7760fb_remove(struct platform_device *dev)
|
|
{
|
|
struct fb_info *info = platform_get_drvdata(dev);
|
|
struct sh7760fb_par *par = info->par;
|
|
|
|
sh7760fb_blank(FB_BLANK_POWERDOWN, info);
|
|
unregister_framebuffer(info);
|
|
fb_dealloc_cmap(&info->cmap);
|
|
sh7760fb_free_mem(info);
|
|
if (par->irq >= 0)
|
|
free_irq(par->irq, &par->vsync);
|
|
iounmap(par->base);
|
|
release_mem_region(par->ioarea->start, resource_size(par->ioarea));
|
|
framebuffer_release(info);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sh7760_lcdc_driver = {
|
|
.driver = {
|
|
.name = "sh7760-lcdc",
|
|
},
|
|
.probe = sh7760fb_probe,
|
|
.remove = sh7760fb_remove,
|
|
};
|
|
|
|
module_platform_driver(sh7760_lcdc_driver);
|
|
|
|
MODULE_AUTHOR("Nobuhiro Iwamatsu, Manuel Lauss");
|
|
MODULE_DESCRIPTION("FBdev for SH7760/63 integrated LCD Controller");
|
|
MODULE_LICENSE("GPL v2");
|