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8a48ac3393
Now that the fbops member of struct fb_info is const, we can start making the ops const as well. This does not cover all drivers; some actually modify the fbops struct, for example to adjust for different configurations, and others do more involved things that I'd rather not touch in practically obsolete drivers. Mostly this is the low hanging fruit where we can add "const" and be done with it. v3: - un-constify atyfb, mb862xx, nvidia and uvesabf (0day) v2: - fix typo (Christophe de Dinechin) - use "static const" instead of "const static" in mx3fb.c - also constify smscufx.c Cc: linux-fbdev@vger.kernel.org Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ce67f14435f3af498f2e8bf35ce4be11f7504132.1575390740.git.jani.nikula@intel.com
556 lines
14 KiB
C
556 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Driver for Aeroflex Gaisler SVGACTRL framebuffer device.
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*
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* 2011 (c) Aeroflex Gaisler AB
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*
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* Full documentation of the core can be found here:
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* http://www.gaisler.com/products/grlib/grip.pdf
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*
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* Contributors: Kristoffer Glembo <kristoffer@gaisler.com>
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/of_platform.h>
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#include <linux/of_device.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/tty.h>
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#include <linux/mm.h>
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#include <linux/fb.h>
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#include <linux/io.h>
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struct grvga_regs {
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u32 status; /* 0x00 */
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u32 video_length; /* 0x04 */
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u32 front_porch; /* 0x08 */
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u32 sync_length; /* 0x0C */
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u32 line_length; /* 0x10 */
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u32 fb_pos; /* 0x14 */
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u32 clk_vector[4]; /* 0x18 */
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u32 clut; /* 0x20 */
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};
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struct grvga_par {
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struct grvga_regs *regs;
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u32 color_palette[16]; /* 16 entry pseudo palette used by fbcon in true color mode */
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int clk_sel;
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int fb_alloced; /* = 1 if framebuffer is allocated in main memory */
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};
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static const struct fb_videomode grvga_modedb[] = {
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{
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/* 640x480 @ 60 Hz */
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NULL, 60, 640, 480, 40000, 48, 16, 39, 11, 96, 2,
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0, FB_VMODE_NONINTERLACED
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}, {
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/* 800x600 @ 60 Hz */
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NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4,
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0, FB_VMODE_NONINTERLACED
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}, {
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/* 800x600 @ 72 Hz */
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NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6,
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0, FB_VMODE_NONINTERLACED
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}, {
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/* 1024x768 @ 60 Hz */
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NULL, 60, 1024, 768, 15385, 160, 24, 29, 3, 136, 6,
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0, FB_VMODE_NONINTERLACED
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}
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};
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static const struct fb_fix_screeninfo grvga_fix = {
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.id = "AG SVGACTRL",
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.type = FB_TYPE_PACKED_PIXELS,
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.visual = FB_VISUAL_PSEUDOCOLOR,
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.xpanstep = 0,
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.ypanstep = 1,
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.ywrapstep = 0,
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.accel = FB_ACCEL_NONE,
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};
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static int grvga_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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struct grvga_par *par = info->par;
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int i;
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if (!var->xres)
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var->xres = 1;
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if (!var->yres)
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var->yres = 1;
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if (var->bits_per_pixel <= 8)
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var->bits_per_pixel = 8;
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else if (var->bits_per_pixel <= 16)
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var->bits_per_pixel = 16;
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else if (var->bits_per_pixel <= 24)
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var->bits_per_pixel = 24;
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else if (var->bits_per_pixel <= 32)
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var->bits_per_pixel = 32;
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else
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return -EINVAL;
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var->xres_virtual = var->xres;
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var->yres_virtual = 2*var->yres;
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if (info->fix.smem_len) {
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if ((var->yres_virtual*var->xres_virtual*var->bits_per_pixel/8) > info->fix.smem_len)
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return -ENOMEM;
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}
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/* Which clocks that are available can be read out in these registers */
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for (i = 0; i <= 3 ; i++) {
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if (var->pixclock == par->regs->clk_vector[i])
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break;
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}
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if (i <= 3)
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par->clk_sel = i;
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else
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return -EINVAL;
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switch (info->var.bits_per_pixel) {
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case 8:
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var->red = (struct fb_bitfield) {0, 8, 0}; /* offset, length, msb-right */
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var->green = (struct fb_bitfield) {0, 8, 0};
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var->blue = (struct fb_bitfield) {0, 8, 0};
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var->transp = (struct fb_bitfield) {0, 0, 0};
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break;
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case 16:
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var->red = (struct fb_bitfield) {11, 5, 0};
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var->green = (struct fb_bitfield) {5, 6, 0};
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var->blue = (struct fb_bitfield) {0, 5, 0};
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var->transp = (struct fb_bitfield) {0, 0, 0};
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break;
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case 24:
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case 32:
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var->red = (struct fb_bitfield) {16, 8, 0};
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var->green = (struct fb_bitfield) {8, 8, 0};
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var->blue = (struct fb_bitfield) {0, 8, 0};
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var->transp = (struct fb_bitfield) {24, 8, 0};
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int grvga_set_par(struct fb_info *info)
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{
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u32 func = 0;
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struct grvga_par *par = info->par;
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__raw_writel(((info->var.yres - 1) << 16) | (info->var.xres - 1),
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&par->regs->video_length);
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__raw_writel((info->var.lower_margin << 16) | (info->var.right_margin),
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&par->regs->front_porch);
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__raw_writel((info->var.vsync_len << 16) | (info->var.hsync_len),
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&par->regs->sync_length);
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__raw_writel(((info->var.yres + info->var.lower_margin + info->var.upper_margin + info->var.vsync_len - 1) << 16) |
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(info->var.xres + info->var.right_margin + info->var.left_margin + info->var.hsync_len - 1),
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&par->regs->line_length);
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switch (info->var.bits_per_pixel) {
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case 8:
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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func = 1;
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break;
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case 16:
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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func = 2;
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break;
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case 24:
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case 32:
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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func = 3;
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break;
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default:
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return -EINVAL;
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}
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__raw_writel((par->clk_sel << 6) | (func << 4) | 1,
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&par->regs->status);
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info->fix.line_length = (info->var.xres_virtual*info->var.bits_per_pixel)/8;
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return 0;
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}
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static int grvga_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *info)
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{
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struct grvga_par *par;
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par = info->par;
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if (regno >= 256) /* Size of CLUT */
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return -EINVAL;
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if (info->var.grayscale) {
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/* grayscale = 0.30*R + 0.59*G + 0.11*B */
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red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
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}
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#define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
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red = CNVT_TOHW(red, info->var.red.length);
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green = CNVT_TOHW(green, info->var.green.length);
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blue = CNVT_TOHW(blue, info->var.blue.length);
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transp = CNVT_TOHW(transp, info->var.transp.length);
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#undef CNVT_TOHW
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/* In PSEUDOCOLOR we use the hardware CLUT */
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if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR)
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__raw_writel((regno << 24) | (red << 16) | (green << 8) | blue,
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&par->regs->clut);
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/* Truecolor uses the pseudo palette */
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else if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
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u32 v;
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if (regno >= 16)
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return -EINVAL;
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v = (red << info->var.red.offset) |
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(green << info->var.green.offset) |
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(blue << info->var.blue.offset) |
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(transp << info->var.transp.offset);
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((u32 *) (info->pseudo_palette))[regno] = v;
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}
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return 0;
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}
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static int grvga_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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struct grvga_par *par = info->par;
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struct fb_fix_screeninfo *fix = &info->fix;
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u32 base_addr;
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if (var->xoffset != 0)
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return -EINVAL;
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base_addr = fix->smem_start + (var->yoffset * fix->line_length);
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base_addr &= ~3UL;
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/* Set framebuffer base address */
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__raw_writel(base_addr,
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&par->regs->fb_pos);
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return 0;
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}
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static const struct fb_ops grvga_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = grvga_check_var,
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.fb_set_par = grvga_set_par,
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.fb_setcolreg = grvga_setcolreg,
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.fb_pan_display = grvga_pan_display,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit
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};
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static int grvga_parse_custom(char *options,
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struct fb_var_screeninfo *screendata)
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{
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char *this_opt;
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int count = 0;
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if (!options || !*options)
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return -1;
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while ((this_opt = strsep(&options, " ")) != NULL) {
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if (!*this_opt)
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continue;
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switch (count) {
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case 0:
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screendata->pixclock = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 1:
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screendata->xres = screendata->xres_virtual = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 2:
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screendata->right_margin = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 3:
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screendata->hsync_len = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 4:
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screendata->left_margin = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 5:
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screendata->yres = screendata->yres_virtual = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 6:
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screendata->lower_margin = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 7:
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screendata->vsync_len = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 8:
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screendata->upper_margin = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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case 9:
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screendata->bits_per_pixel = simple_strtoul(this_opt, NULL, 0);
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count++;
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break;
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default:
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return -1;
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}
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}
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screendata->activate = FB_ACTIVATE_NOW;
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screendata->vmode = FB_VMODE_NONINTERLACED;
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return 0;
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}
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static int grvga_probe(struct platform_device *dev)
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{
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struct fb_info *info;
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int retval = -ENOMEM;
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unsigned long virtual_start;
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unsigned long grvga_fix_addr = 0;
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unsigned long physical_start = 0;
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unsigned long grvga_mem_size = 0;
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struct grvga_par *par = NULL;
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char *options = NULL, *mode_opt = NULL;
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info = framebuffer_alloc(sizeof(struct grvga_par), &dev->dev);
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if (!info)
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return -ENOMEM;
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/* Expecting: "grvga: modestring, [addr:<framebuffer physical address>], [size:<framebuffer size>]
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*
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* If modestring is custom:<custom mode string> we parse the string which then contains all videoparameters
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* If address is left out, we allocate memory,
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* if size is left out we only allocate enough to support the given mode.
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*/
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if (fb_get_options("grvga", &options)) {
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retval = -ENODEV;
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goto free_fb;
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}
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if (!options || !*options)
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options = "640x480-8@60";
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while (1) {
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char *this_opt = strsep(&options, ",");
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if (!this_opt)
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break;
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if (!strncmp(this_opt, "custom", 6)) {
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if (grvga_parse_custom(this_opt, &info->var) < 0) {
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dev_err(&dev->dev, "Failed to parse custom mode (%s).\n", this_opt);
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retval = -EINVAL;
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goto free_fb;
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}
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} else if (!strncmp(this_opt, "addr", 4))
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grvga_fix_addr = simple_strtoul(this_opt + 5, NULL, 16);
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else if (!strncmp(this_opt, "size", 4))
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grvga_mem_size = simple_strtoul(this_opt + 5, NULL, 0);
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else
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mode_opt = this_opt;
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}
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par = info->par;
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info->fbops = &grvga_ops;
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info->fix = grvga_fix;
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info->pseudo_palette = par->color_palette;
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info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN;
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info->fix.smem_len = grvga_mem_size;
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if (!devm_request_mem_region(&dev->dev, dev->resource[0].start,
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resource_size(&dev->resource[0]), "grlib-svgactrl regs")) {
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dev_err(&dev->dev, "registers already mapped\n");
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retval = -EBUSY;
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goto free_fb;
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}
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par->regs = of_ioremap(&dev->resource[0], 0,
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resource_size(&dev->resource[0]),
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"grlib-svgactrl regs");
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if (!par->regs) {
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dev_err(&dev->dev, "failed to map registers\n");
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retval = -ENOMEM;
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goto free_fb;
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}
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retval = fb_alloc_cmap(&info->cmap, 256, 0);
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if (retval < 0) {
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dev_err(&dev->dev, "failed to allocate mem with fb_alloc_cmap\n");
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retval = -ENOMEM;
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goto unmap_regs;
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}
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if (mode_opt) {
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retval = fb_find_mode(&info->var, info, mode_opt,
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grvga_modedb, sizeof(grvga_modedb), &grvga_modedb[0], 8);
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if (!retval || retval == 4) {
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retval = -EINVAL;
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goto dealloc_cmap;
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}
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}
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if (!grvga_mem_size)
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grvga_mem_size = info->var.xres_virtual * info->var.yres_virtual * info->var.bits_per_pixel/8;
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if (grvga_fix_addr) {
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/* Got framebuffer base address from argument list */
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physical_start = grvga_fix_addr;
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if (!devm_request_mem_region(&dev->dev, physical_start,
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grvga_mem_size, dev->name)) {
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dev_err(&dev->dev, "failed to request memory region\n");
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retval = -ENOMEM;
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goto dealloc_cmap;
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}
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virtual_start = (unsigned long) ioremap(physical_start, grvga_mem_size);
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if (!virtual_start) {
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dev_err(&dev->dev, "error mapping framebuffer memory\n");
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retval = -ENOMEM;
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goto dealloc_cmap;
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}
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} else { /* Allocate frambuffer memory */
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unsigned long page;
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virtual_start = (unsigned long) __get_free_pages(GFP_DMA,
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get_order(grvga_mem_size));
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if (!virtual_start) {
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dev_err(&dev->dev,
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"unable to allocate framebuffer memory (%lu bytes)\n",
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grvga_mem_size);
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retval = -ENOMEM;
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goto dealloc_cmap;
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}
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physical_start = dma_map_single(&dev->dev, (void *)virtual_start, grvga_mem_size, DMA_TO_DEVICE);
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/* Set page reserved so that mmap will work. This is necessary
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* since we'll be remapping normal memory.
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*/
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for (page = virtual_start;
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page < PAGE_ALIGN(virtual_start + grvga_mem_size);
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page += PAGE_SIZE) {
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SetPageReserved(virt_to_page(page));
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}
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par->fb_alloced = 1;
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}
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memset((unsigned long *) virtual_start, 0, grvga_mem_size);
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info->screen_base = (char __iomem *) virtual_start;
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info->fix.smem_start = physical_start;
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info->fix.smem_len = grvga_mem_size;
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dev_set_drvdata(&dev->dev, info);
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dev_info(&dev->dev,
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"Aeroflex Gaisler framebuffer device (fb%d), %dx%d-%d, using %luK of video memory @ %p\n",
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info->node, info->var.xres, info->var.yres, info->var.bits_per_pixel,
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|
grvga_mem_size >> 10, info->screen_base);
|
|
|
|
retval = register_framebuffer(info);
|
|
if (retval < 0) {
|
|
dev_err(&dev->dev, "failed to register framebuffer\n");
|
|
goto free_mem;
|
|
}
|
|
|
|
__raw_writel(physical_start, &par->regs->fb_pos);
|
|
__raw_writel(__raw_readl(&par->regs->status) | 1, /* Enable framebuffer */
|
|
&par->regs->status);
|
|
|
|
return 0;
|
|
|
|
free_mem:
|
|
if (grvga_fix_addr)
|
|
iounmap((void *)virtual_start);
|
|
else
|
|
kfree((void *)virtual_start);
|
|
dealloc_cmap:
|
|
fb_dealloc_cmap(&info->cmap);
|
|
unmap_regs:
|
|
of_iounmap(&dev->resource[0], par->regs,
|
|
resource_size(&dev->resource[0]));
|
|
free_fb:
|
|
framebuffer_release(info);
|
|
|
|
return retval;
|
|
}
|
|
|
|
static int grvga_remove(struct platform_device *device)
|
|
{
|
|
struct fb_info *info = dev_get_drvdata(&device->dev);
|
|
struct grvga_par *par;
|
|
|
|
if (info) {
|
|
par = info->par;
|
|
unregister_framebuffer(info);
|
|
fb_dealloc_cmap(&info->cmap);
|
|
|
|
of_iounmap(&device->resource[0], par->regs,
|
|
resource_size(&device->resource[0]));
|
|
|
|
if (!par->fb_alloced)
|
|
iounmap(info->screen_base);
|
|
else
|
|
kfree((void *)info->screen_base);
|
|
|
|
framebuffer_release(info);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct of_device_id svgactrl_of_match[] = {
|
|
{
|
|
.name = "GAISLER_SVGACTRL",
|
|
},
|
|
{
|
|
.name = "01_063",
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, svgactrl_of_match);
|
|
|
|
static struct platform_driver grvga_driver = {
|
|
.driver = {
|
|
.name = "grlib-svgactrl",
|
|
.of_match_table = svgactrl_of_match,
|
|
},
|
|
.probe = grvga_probe,
|
|
.remove = grvga_remove,
|
|
};
|
|
|
|
module_platform_driver(grvga_driver);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Aeroflex Gaisler");
|
|
MODULE_DESCRIPTION("Aeroflex Gaisler framebuffer device driver");
|