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ebf5cf7628
In order to support other SoCs, it's needed to have a different stop() implementation for each SoC. This commit adds no functionality, and it consists of preparation work. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Jason Cooper <jason@lakedaemon.net> Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
502 lines
13 KiB
C
502 lines
13 KiB
C
/*
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* drivers/watchdog/orion_wdt.c
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*
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* Watchdog driver for Orion/Kirkwood processors
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*
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* Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
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#define ORION_RSTOUT_MASK_OFFSET 0x20108
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/* Internal registers can be configured at any 1 MiB aligned address */
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#define INTERNAL_REGS_MASK ~(SZ_1M - 1)
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/*
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* Watchdog timer block registers.
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*/
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#define TIMER_CTRL 0x0000
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#define TIMER_A370_STATUS 0x04
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#define WDT_MAX_CYCLE_COUNT 0xffffffff
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#define WDT_A370_RATIO_MASK(v) ((v) << 16)
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#define WDT_A370_RATIO_SHIFT 5
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#define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
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#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
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#define WDT_A370_EXPIRED BIT(31)
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static int heartbeat = -1; /* module parameter (seconds) */
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struct orion_watchdog;
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struct orion_watchdog_data {
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int wdt_counter_offset;
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int wdt_enable_bit;
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int rstout_enable_bit;
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int (*clock_init)(struct platform_device *,
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struct orion_watchdog *);
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int (*start)(struct watchdog_device *);
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int (*stop)(struct watchdog_device *);
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};
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struct orion_watchdog {
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struct watchdog_device wdt;
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void __iomem *reg;
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void __iomem *rstout;
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unsigned long clk_rate;
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struct clk *clk;
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const struct orion_watchdog_data *data;
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};
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static int orion_wdt_clock_init(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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int ret;
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dev->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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dev->clk_rate = clk_get_rate(dev->clk);
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return 0;
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}
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static int armada370_wdt_clock_init(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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int ret;
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dev->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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/* Setup watchdog input clock */
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atomic_io_modify(dev->reg + TIMER_CTRL,
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WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
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WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
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dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
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return 0;
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}
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static int armadaxp_wdt_clock_init(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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int ret;
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dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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clk_put(dev->clk);
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return ret;
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}
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/* Enable the fixed watchdog clock input */
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atomic_io_modify(dev->reg + TIMER_CTRL,
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WDT_AXP_FIXED_ENABLE_BIT,
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WDT_AXP_FIXED_ENABLE_BIT);
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dev->clk_rate = clk_get_rate(dev->clk);
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return 0;
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}
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static int orion_wdt_ping(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* Reload watchdog duration */
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writel(dev->clk_rate * wdt_dev->timeout,
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dev->reg + dev->data->wdt_counter_offset);
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return 0;
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}
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static int armada370_start(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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u32 reg;
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/* Set watchdog duration */
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writel(dev->clk_rate * wdt_dev->timeout,
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dev->reg + dev->data->wdt_counter_offset);
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/* Clear the watchdog expiration bit */
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atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
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/* Enable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
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dev->data->wdt_enable_bit);
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/* Enable reset on watchdog */
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reg = readl(dev->rstout);
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reg |= dev->data->rstout_enable_bit;
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writel(reg, dev->rstout);
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return 0;
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}
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static int orion_start(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* Set watchdog duration */
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writel(dev->clk_rate * wdt_dev->timeout,
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dev->reg + dev->data->wdt_counter_offset);
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/* Enable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
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dev->data->wdt_enable_bit);
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/* Enable reset on watchdog */
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atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
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dev->data->rstout_enable_bit);
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return 0;
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}
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static int orion_wdt_start(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* There are some per-SoC quirks to handle */
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return dev->data->start(wdt_dev);
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}
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static int orion_stop(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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/* Disable reset on watchdog */
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atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0);
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/* Disable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
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return 0;
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}
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static int armada370_stop(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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u32 reg;
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/* Disable reset on watchdog */
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reg = readl(dev->rstout);
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reg &= ~dev->data->rstout_enable_bit;
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writel(reg, dev->rstout);
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/* Disable watchdog timer */
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atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
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return 0;
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}
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static int orion_wdt_stop(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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return dev->data->stop(wdt_dev);
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}
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static int orion_wdt_enabled(struct orion_watchdog *dev)
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{
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bool enabled, running;
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enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
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running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
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return enabled && running;
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}
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static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
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{
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
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}
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static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
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unsigned int timeout)
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{
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wdt_dev->timeout = timeout;
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return 0;
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}
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static const struct watchdog_info orion_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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.identity = "Orion Watchdog",
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};
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static const struct watchdog_ops orion_wdt_ops = {
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.owner = THIS_MODULE,
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.start = orion_wdt_start,
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.stop = orion_wdt_stop,
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.ping = orion_wdt_ping,
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.set_timeout = orion_wdt_set_timeout,
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.get_timeleft = orion_wdt_get_timeleft,
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};
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static irqreturn_t orion_wdt_irq(int irq, void *devid)
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{
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panic("Watchdog Timeout");
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return IRQ_HANDLED;
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}
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/*
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* The original devicetree binding for this driver specified only
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* one memory resource, so in order to keep DT backwards compatibility
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* we try to fallback to a hardcoded register address, if the resource
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* is missing from the devicetree.
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*/
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static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev,
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phys_addr_t internal_regs)
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{
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struct resource *res;
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phys_addr_t rstout;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (res)
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return devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;
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WARN(1, FW_BUG "falling back to harcoded RSTOUT reg %pa\n", &rstout);
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return devm_ioremap(&pdev->dev, rstout, 0x4);
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}
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static const struct orion_watchdog_data orion_data = {
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.rstout_enable_bit = BIT(1),
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.wdt_enable_bit = BIT(4),
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.wdt_counter_offset = 0x24,
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.clock_init = orion_wdt_clock_init,
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.start = orion_start,
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.stop = orion_stop,
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};
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static const struct orion_watchdog_data armada370_data = {
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.rstout_enable_bit = BIT(8),
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.wdt_enable_bit = BIT(8),
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.wdt_counter_offset = 0x34,
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.clock_init = armada370_wdt_clock_init,
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.start = armada370_start,
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.stop = armada370_stop,
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};
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static const struct orion_watchdog_data armadaxp_data = {
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.rstout_enable_bit = BIT(8),
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.wdt_enable_bit = BIT(8),
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.wdt_counter_offset = 0x34,
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.clock_init = armadaxp_wdt_clock_init,
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.start = armada370_start,
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.stop = armada370_stop,
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};
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static const struct of_device_id orion_wdt_of_match_table[] = {
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{
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.compatible = "marvell,orion-wdt",
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.data = &orion_data,
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},
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{
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.compatible = "marvell,armada-370-wdt",
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.data = &armada370_data,
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},
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{
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.compatible = "marvell,armada-xp-wdt",
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.data = &armadaxp_data,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
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static int orion_wdt_get_regs(struct platform_device *pdev,
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struct orion_watchdog *dev)
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{
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struct device_node *node = pdev->dev.of_node;
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struct resource *res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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dev->reg = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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if (!dev->reg)
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return -ENOMEM;
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/* Each supported compatible has some RSTOUT register quirk */
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if (of_device_is_compatible(node, "marvell,orion-wdt")) {
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dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
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INTERNAL_REGS_MASK);
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if (!dev->rstout)
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return -ENODEV;
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} else if (of_device_is_compatible(node, "marvell,armada-370-wdt") ||
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of_device_is_compatible(node, "marvell,armada-xp-wdt")) {
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/* Dedicated RSTOUT register, can be requested. */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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dev->rstout = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(dev->rstout))
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return PTR_ERR(dev->rstout);
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} else {
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return -ENODEV;
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}
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return 0;
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}
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static int orion_wdt_probe(struct platform_device *pdev)
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{
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struct orion_watchdog *dev;
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const struct of_device_id *match;
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unsigned int wdt_max_duration; /* (seconds) */
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int ret, irq;
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dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),
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GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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match = of_match_device(orion_wdt_of_match_table, &pdev->dev);
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if (!match)
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/* Default legacy match */
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match = &orion_wdt_of_match_table[0];
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dev->wdt.info = &orion_wdt_info;
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dev->wdt.ops = &orion_wdt_ops;
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dev->wdt.min_timeout = 1;
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dev->data = match->data;
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ret = orion_wdt_get_regs(pdev, dev);
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if (ret)
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return ret;
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ret = dev->data->clock_init(pdev, dev);
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if (ret) {
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dev_err(&pdev->dev, "cannot initialize clock\n");
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return ret;
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}
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wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate;
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dev->wdt.timeout = wdt_max_duration;
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dev->wdt.max_timeout = wdt_max_duration;
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watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev);
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platform_set_drvdata(pdev, &dev->wdt);
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watchdog_set_drvdata(&dev->wdt, dev);
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/*
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* Let's make sure the watchdog is fully stopped, unless it's
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* explicitly enabled. This may be the case if the module was
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* removed and re-insterted, or if the bootloader explicitly
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* set a running watchdog before booting the kernel.
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*/
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if (!orion_wdt_enabled(dev))
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orion_wdt_stop(&dev->wdt);
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/* Request the IRQ only after the watchdog is disabled */
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irq = platform_get_irq(pdev, 0);
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if (irq > 0) {
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/*
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* Not all supported platforms specify an interrupt for the
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* watchdog, so let's make it optional.
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*/
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ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
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pdev->name, dev);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to request IRQ\n");
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goto disable_clk;
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}
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}
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watchdog_set_nowayout(&dev->wdt, nowayout);
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ret = watchdog_register_device(&dev->wdt);
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if (ret)
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goto disable_clk;
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pr_info("Initial timeout %d sec%s\n",
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dev->wdt.timeout, nowayout ? ", nowayout" : "");
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return 0;
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disable_clk:
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clk_disable_unprepare(dev->clk);
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clk_put(dev->clk);
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return ret;
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}
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static int orion_wdt_remove(struct platform_device *pdev)
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{
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struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
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struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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watchdog_unregister_device(wdt_dev);
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clk_disable_unprepare(dev->clk);
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clk_put(dev->clk);
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return 0;
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}
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static void orion_wdt_shutdown(struct platform_device *pdev)
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{
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struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
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orion_wdt_stop(wdt_dev);
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}
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static struct platform_driver orion_wdt_driver = {
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.probe = orion_wdt_probe,
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.remove = orion_wdt_remove,
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.shutdown = orion_wdt_shutdown,
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.driver = {
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.owner = THIS_MODULE,
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.name = "orion_wdt",
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.of_match_table = orion_wdt_of_match_table,
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},
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};
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module_platform_driver(orion_wdt_driver);
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MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
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MODULE_DESCRIPTION("Orion Processor Watchdog");
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:orion_wdt");
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