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There is a need to use RT5682 as DAI clock master for other codecs within a platform, which means that the DAI clocks are required to remain, regardless of whether the RT5682 is actually running playback/capture. The RT5682 CCF basic functions are implemented almost by the existing internal functions and asoc apis. It needs a clk provider (rt5682 mclk) to generate the bclk and wclk outputs. The RT5682 CCF supports and restricts as below: 1. Fmt of DAI-AIF1 must be configured to master before using CCF. 2. Only accept a 48MHz clk as the clk provider. 3. Only provide a 48kHz wclk and a set of multiples of wclk as bclk. There are some temporary limitations in this patch until a better implementation. Signed-off-by: Derek Fang <derek.fang@realtek.com> Link: https://lore.kernel.org/r/1582033912-6841-1-git-send-email-derek.fang@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
47 lines
817 B
C
47 lines
817 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* linux/sound/rt5682.h -- Platform data for RT5682
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*
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* Copyright 2018 Realtek Microelectronics
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*/
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#ifndef __LINUX_SND_RT5682_H
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#define __LINUX_SND_RT5682_H
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enum rt5682_dmic1_data_pin {
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RT5682_DMIC1_NULL,
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RT5682_DMIC1_DATA_GPIO2,
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RT5682_DMIC1_DATA_GPIO5,
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};
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enum rt5682_dmic1_clk_pin {
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RT5682_DMIC1_CLK_GPIO1,
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RT5682_DMIC1_CLK_GPIO3,
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};
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enum rt5682_jd_src {
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RT5682_JD_NULL,
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RT5682_JD1,
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};
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enum rt5682_dai_clks {
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RT5682_DAI_WCLK_IDX,
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RT5682_DAI_BCLK_IDX,
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RT5682_DAI_NUM_CLKS,
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};
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struct rt5682_platform_data {
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int ldo1_en; /* GPIO for LDO1_EN */
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enum rt5682_dmic1_data_pin dmic1_data_pin;
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enum rt5682_dmic1_clk_pin dmic1_clk_pin;
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enum rt5682_jd_src jd_src;
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unsigned int btndet_delay;
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const char *dai_clk_names[RT5682_DAI_NUM_CLKS];
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};
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#endif
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