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cce8ccca80
As warned by cppcheck: [drivers/media/dvb-frontends/cx24123.c:434]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour [drivers/media/pci/bt8xx/bttv-input.c:87]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour [drivers/media/pci/bt8xx/bttv-input.c:98]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour ... [drivers/media/v4l2-core/v4l2-ioctl.c:1391]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour There are lots of places where we're doing 1 << 31. That's bad, as, depending on the architecture, this has an undefined behavior. The BIT() macro is already prepared to handle this, so, let's just switch all "1 << number" macros by BIT(number) at the header files with has 1 << 31. Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> # exynos4-is and s3c-camif Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # omap3isp, vsp1, xilinx, wl128x and ipu3 Reviewed-by: Benoit Parrot <bparrot@ti.com> # am437x and ti-vpe Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
390 lines
11 KiB
C
390 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* FM Driver for Connectivity chip of Texas Instruments.
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* FM Common module header file
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*
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* Copyright (C) 2011 Texas Instruments
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*/
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#ifndef _FMDRV_COMMON_H
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#define _FMDRV_COMMON_H
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#define FM_ST_REG_TIMEOUT msecs_to_jiffies(6000) /* 6 sec */
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#define FM_PKT_LOGICAL_CHAN_NUMBER 0x08 /* Logical channel 8 */
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#define REG_RD 0x1
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#define REG_WR 0x0
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struct fm_reg_table {
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u8 opcode;
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u8 type;
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u8 *name;
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};
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#define STEREO_GET 0
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#define RSSI_LVL_GET 1
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#define IF_COUNT_GET 2
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#define FLAG_GET 3
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#define RDS_SYNC_GET 4
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#define RDS_DATA_GET 5
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#define FREQ_SET 10
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#define AF_FREQ_SET 11
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#define MOST_MODE_SET 12
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#define MOST_BLEND_SET 13
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#define DEMPH_MODE_SET 14
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#define SEARCH_LVL_SET 15
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#define BAND_SET 16
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#define MUTE_STATUS_SET 17
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#define RDS_PAUSE_LVL_SET 18
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#define RDS_PAUSE_DUR_SET 19
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#define RDS_MEM_SET 20
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#define RDS_BLK_B_SET 21
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#define RDS_MSK_B_SET 22
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#define RDS_PI_MASK_SET 23
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#define RDS_PI_SET 24
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#define RDS_SYSTEM_SET 25
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#define INT_MASK_SET 26
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#define SEARCH_DIR_SET 27
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#define VOLUME_SET 28
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#define AUDIO_ENABLE_SET 29
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#define PCM_MODE_SET 30
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#define I2S_MODE_CONFIG_SET 31
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#define POWER_SET 32
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#define INTX_CONFIG_SET 33
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#define PULL_EN_SET 34
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#define HILO_SET 35
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#define SWITCH2FREF 36
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#define FREQ_DRIFT_REPORT 37
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#define PCE_GET 40
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#define FIRM_VER_GET 41
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#define ASIC_VER_GET 42
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#define ASIC_ID_GET 43
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#define MAN_ID_GET 44
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#define TUNER_MODE_SET 45
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#define STOP_SEARCH 46
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#define RDS_CNTRL_SET 47
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#define WRITE_HARDWARE_REG 100
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#define CODE_DOWNLOAD 101
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#define RESET 102
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#define FM_POWER_MODE 254
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#define FM_INTERRUPT 255
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/* Transmitter API */
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#define CHANL_SET 55
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#define CHANL_BW_SET 56
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#define REF_SET 57
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#define POWER_ENB_SET 90
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#define POWER_ATT_SET 58
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#define POWER_LEV_SET 59
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#define AUDIO_DEV_SET 60
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#define PILOT_DEV_SET 61
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#define RDS_DEV_SET 62
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#define TX_BAND_SET 65
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#define PUPD_SET 91
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#define AUDIO_IO_SET 63
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#define PREMPH_SET 64
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#define MONO_SET 66
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#define MUTE 92
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#define MPX_LMT_ENABLE 67
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#define PI_SET 93
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#define ECC_SET 69
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#define PTY 70
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#define AF 71
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#define DISPLAY_MODE 74
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#define RDS_REP_SET 77
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#define RDS_CONFIG_DATA_SET 98
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#define RDS_DATA_SET 99
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#define RDS_DATA_ENB 94
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#define TA_SET 78
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#define TP_SET 79
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#define DI_SET 80
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#define MS_SET 81
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#define PS_SCROLL_SPEED 82
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#define TX_AUDIO_LEVEL_TEST 96
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#define TX_AUDIO_LEVEL_TEST_THRESHOLD 73
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#define TX_AUDIO_INPUT_LEVEL_RANGE_SET 54
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#define RX_ANTENNA_SELECT 87
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#define I2C_DEV_ADDR_SET 86
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#define REF_ERR_CALIB_PARAM_SET 88
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#define REF_ERR_CALIB_PERIODICITY_SET 89
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#define SOC_INT_TRIGGER 52
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#define SOC_AUDIO_PATH_SET 83
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#define SOC_PCMI_OVERRIDE 84
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#define SOC_I2S_OVERRIDE 85
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#define RSSI_BLOCK_SCAN_FREQ_SET 95
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#define RSSI_BLOCK_SCAN_START 97
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#define RSSI_BLOCK_SCAN_DATA_GET 5
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#define READ_FMANT_TUNE_VALUE 104
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/* SKB helpers */
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struct fm_skb_cb {
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__u8 fm_op;
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struct completion *completion;
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};
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#define fm_cb(skb) ((struct fm_skb_cb *)(skb->cb))
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/* FM Channel-8 command message format */
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struct fm_cmd_msg_hdr {
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__u8 hdr; /* Logical Channel-8 */
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__u8 len; /* Number of bytes follows */
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__u8 op; /* FM Opcode */
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__u8 rd_wr; /* Read/Write command */
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__u8 dlen; /* Length of payload */
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} __attribute__ ((packed));
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#define FM_CMD_MSG_HDR_SIZE 5 /* sizeof(struct fm_cmd_msg_hdr) */
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/* FM Channel-8 event messgage format */
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struct fm_event_msg_hdr {
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__u8 header; /* Logical Channel-8 */
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__u8 len; /* Number of bytes follows */
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__u8 status; /* Event status */
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__u8 num_fm_hci_cmds; /* Number of pkts the host allowed to send */
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__u8 op; /* FM Opcode */
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__u8 rd_wr; /* Read/Write command */
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__u8 dlen; /* Length of payload */
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} __attribute__ ((packed));
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#define FM_EVT_MSG_HDR_SIZE 7 /* sizeof(struct fm_event_msg_hdr) */
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/* TI's magic number in firmware file */
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#define FM_FW_FILE_HEADER_MAGIC 0x42535442
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#define FM_ENABLE 1
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#define FM_DISABLE 0
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/* FLAG_GET register bits */
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#define FM_FR_EVENT BIT(0)
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#define FM_BL_EVENT BIT(1)
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#define FM_RDS_EVENT BIT(2)
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#define FM_BBLK_EVENT BIT(3)
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#define FM_LSYNC_EVENT BIT(4)
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#define FM_LEV_EVENT BIT(5)
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#define FM_IFFR_EVENT BIT(6)
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#define FM_PI_EVENT BIT(7)
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#define FM_PD_EVENT BIT(8)
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#define FM_STIC_EVENT BIT(9)
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#define FM_MAL_EVENT BIT(10)
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#define FM_POW_ENB_EVENT BIT(11)
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/*
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* Firmware files of FM. ASIC ID and ASIC version will be appened to this,
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* later.
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*/
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#define FM_FMC_FW_FILE_START ("fmc_ch8")
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#define FM_RX_FW_FILE_START ("fm_rx_ch8")
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#define FM_TX_FW_FILE_START ("fm_tx_ch8")
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#define FM_UNDEFINED_FREQ 0xFFFFFFFF
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/* Band types */
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#define FM_BAND_EUROPE_US 0
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#define FM_BAND_JAPAN 1
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/* Seek directions */
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#define FM_SEARCH_DIRECTION_DOWN 0
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#define FM_SEARCH_DIRECTION_UP 1
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/* Tunner modes */
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#define FM_TUNER_STOP_SEARCH_MODE 0
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#define FM_TUNER_PRESET_MODE 1
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#define FM_TUNER_AUTONOMOUS_SEARCH_MODE 2
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#define FM_TUNER_AF_JUMP_MODE 3
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/* Min and Max volume */
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#define FM_RX_VOLUME_MIN 0
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#define FM_RX_VOLUME_MAX 70
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/* Volume gain step */
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#define FM_RX_VOLUME_GAIN_STEP 0x370
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/* Mute modes */
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#define FM_MUTE_ON 0
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#define FM_MUTE_OFF 1
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#define FM_MUTE_ATTENUATE 2
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#define FM_RX_UNMUTE_MODE 0x00
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#define FM_RX_RF_DEP_MODE 0x01
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#define FM_RX_AC_MUTE_MODE 0x02
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#define FM_RX_HARD_MUTE_LEFT_MODE 0x04
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#define FM_RX_HARD_MUTE_RIGHT_MODE 0x08
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#define FM_RX_SOFT_MUTE_FORCE_MODE 0x10
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/* RF dependent mute mode */
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#define FM_RX_RF_DEPENDENT_MUTE_ON 1
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#define FM_RX_RF_DEPENDENT_MUTE_OFF 0
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/* RSSI threshold min and max */
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#define FM_RX_RSSI_THRESHOLD_MIN -128
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#define FM_RX_RSSI_THRESHOLD_MAX 127
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/* Stereo/Mono mode */
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#define FM_STEREO_MODE 0
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#define FM_MONO_MODE 1
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#define FM_STEREO_SOFT_BLEND 1
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/* FM RX De-emphasis filter modes */
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#define FM_RX_EMPHASIS_FILTER_50_USEC 0
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#define FM_RX_EMPHASIS_FILTER_75_USEC 1
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/* FM RDS modes */
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#define FM_RDS_DISABLE 0
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#define FM_RDS_ENABLE 1
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#define FM_NO_PI_CODE 0
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/* FM and RX RDS block enable/disable */
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#define FM_RX_PWR_SET_FM_ON_RDS_OFF 0x1
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#define FM_RX_PWR_SET_FM_AND_RDS_BLK_ON 0x3
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#define FM_RX_PWR_SET_FM_AND_RDS_BLK_OFF 0x0
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/* RX RDS */
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#define FM_RX_RDS_FLUSH_FIFO 0x1
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#define FM_RX_RDS_FIFO_THRESHOLD 64 /* tuples */
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#define FM_RDS_BLK_SIZE 3 /* 3 bytes */
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/* RDS block types */
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#define FM_RDS_BLOCK_A 0
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#define FM_RDS_BLOCK_B 1
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#define FM_RDS_BLOCK_C 2
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#define FM_RDS_BLOCK_Ctag 3
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#define FM_RDS_BLOCK_D 4
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#define FM_RDS_BLOCK_E 5
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#define FM_RDS_BLK_IDX_A 0
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#define FM_RDS_BLK_IDX_B 1
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#define FM_RDS_BLK_IDX_C 2
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#define FM_RDS_BLK_IDX_D 3
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#define FM_RDS_BLK_IDX_UNKNOWN 0xF0
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#define FM_RDS_STATUS_ERR_MASK 0x18
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/*
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* Represents an RDS group type & version.
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* There are 15 groups, each group has 2 versions: A and B.
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*/
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#define FM_RDS_GROUP_TYPE_MASK_0A BIT(0)
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#define FM_RDS_GROUP_TYPE_MASK_0B BIT(1)
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#define FM_RDS_GROUP_TYPE_MASK_1A BIT(2)
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#define FM_RDS_GROUP_TYPE_MASK_1B BIT(3)
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#define FM_RDS_GROUP_TYPE_MASK_2A BIT(4)
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#define FM_RDS_GROUP_TYPE_MASK_2B BIT(5)
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#define FM_RDS_GROUP_TYPE_MASK_3A BIT(6)
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#define FM_RDS_GROUP_TYPE_MASK_3B BIT(7)
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#define FM_RDS_GROUP_TYPE_MASK_4A BIT(8)
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#define FM_RDS_GROUP_TYPE_MASK_4B BIT(9)
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#define FM_RDS_GROUP_TYPE_MASK_5A BIT(10)
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#define FM_RDS_GROUP_TYPE_MASK_5B BIT(11)
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#define FM_RDS_GROUP_TYPE_MASK_6A BIT(12)
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#define FM_RDS_GROUP_TYPE_MASK_6B BIT(13)
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#define FM_RDS_GROUP_TYPE_MASK_7A BIT(14)
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#define FM_RDS_GROUP_TYPE_MASK_7B BIT(15)
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#define FM_RDS_GROUP_TYPE_MASK_8A BIT(16)
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#define FM_RDS_GROUP_TYPE_MASK_8B BIT(17)
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#define FM_RDS_GROUP_TYPE_MASK_9A BIT(18)
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#define FM_RDS_GROUP_TYPE_MASK_9B BIT(19)
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#define FM_RDS_GROUP_TYPE_MASK_10A BIT(20)
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#define FM_RDS_GROUP_TYPE_MASK_10B BIT(21)
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#define FM_RDS_GROUP_TYPE_MASK_11A BIT(22)
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#define FM_RDS_GROUP_TYPE_MASK_11B BIT(23)
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#define FM_RDS_GROUP_TYPE_MASK_12A BIT(24)
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#define FM_RDS_GROUP_TYPE_MASK_12B BIT(25)
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#define FM_RDS_GROUP_TYPE_MASK_13A BIT(26)
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#define FM_RDS_GROUP_TYPE_MASK_13B BIT(27)
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#define FM_RDS_GROUP_TYPE_MASK_14A BIT(28)
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#define FM_RDS_GROUP_TYPE_MASK_14B BIT(29)
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#define FM_RDS_GROUP_TYPE_MASK_15A BIT(30)
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#define FM_RDS_GROUP_TYPE_MASK_15B BIT(31)
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/* RX Alternate Frequency info */
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#define FM_RDS_MIN_AF 1
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#define FM_RDS_MAX_AF 204
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#define FM_RDS_MAX_AF_JAPAN 140
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#define FM_RDS_1_AF_FOLLOWS 225
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#define FM_RDS_25_AF_FOLLOWS 249
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/* RDS system type (RDS/RBDS) */
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#define FM_RDS_SYSTEM_RDS 0
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#define FM_RDS_SYSTEM_RBDS 1
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/* AF on/off */
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#define FM_RX_RDS_AF_SWITCH_MODE_ON 1
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#define FM_RX_RDS_AF_SWITCH_MODE_OFF 0
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/* Retry count when interrupt process goes wrong */
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#define FM_IRQ_TIMEOUT_RETRY_MAX 5 /* 5 times */
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/* Audio IO set values */
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#define FM_RX_AUDIO_ENABLE_I2S 0x01
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#define FM_RX_AUDIO_ENABLE_ANALOG 0x02
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#define FM_RX_AUDIO_ENABLE_I2S_AND_ANALOG 0x03
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#define FM_RX_AUDIO_ENABLE_DISABLE 0x00
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/* HI/LO set values */
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#define FM_RX_IFFREQ_TO_HI_SIDE 0x0
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#define FM_RX_IFFREQ_TO_LO_SIDE 0x1
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#define FM_RX_IFFREQ_HILO_AUTOMATIC 0x2
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/*
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* Default RX mode configuration. Chip will be configured
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* with this default values after loading RX firmware.
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*/
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#define FM_DEFAULT_RX_VOLUME 10
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#define FM_DEFAULT_RSSI_THRESHOLD 3
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/* Range for TX power level in units for dB/uV */
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#define FM_PWR_LVL_LOW 91
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#define FM_PWR_LVL_HIGH 122
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/* Chip specific default TX power level value */
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#define FM_PWR_LVL_DEF 4
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/* FM TX Pre-emphasis filter values */
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#define FM_TX_PREEMPH_OFF 1
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#define FM_TX_PREEMPH_50US 0
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#define FM_TX_PREEMPH_75US 2
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/* FM TX antenna impedance values */
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#define FM_TX_ANT_IMP_50 0
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#define FM_TX_ANT_IMP_200 1
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#define FM_TX_ANT_IMP_500 2
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/* Functions exported by FM common sub-module */
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int fmc_prepare(struct fmdev *);
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int fmc_release(struct fmdev *);
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void fmc_update_region_info(struct fmdev *, u8);
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int fmc_send_cmd(struct fmdev *, u8, u16,
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void *, unsigned int, void *, int *);
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int fmc_is_rds_data_available(struct fmdev *, struct file *,
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struct poll_table_struct *);
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int fmc_transfer_rds_from_internal_buff(struct fmdev *, struct file *,
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u8 __user *, size_t);
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int fmc_set_freq(struct fmdev *, u32);
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int fmc_set_mode(struct fmdev *, u8);
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int fmc_set_region(struct fmdev *, u8);
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int fmc_set_mute_mode(struct fmdev *, u8);
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int fmc_set_stereo_mono(struct fmdev *, u16);
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int fmc_set_rds_mode(struct fmdev *, u8);
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int fmc_get_freq(struct fmdev *, u32 *);
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int fmc_get_region(struct fmdev *, u8 *);
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int fmc_get_mode(struct fmdev *, u8 *);
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/*
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* channel spacing
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*/
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#define FM_CHANNEL_SPACING_50KHZ 1
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#define FM_CHANNEL_SPACING_100KHZ 2
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#define FM_CHANNEL_SPACING_200KHZ 4
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#define FM_FREQ_MUL 50
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#endif
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