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8857433245
Add support for the AES/SM4 crypto engine included in the Offload and Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling hardware-acceleration for the following transformations: - ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes); supported for 128-bit and 256-bit keys. - ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4); supported for 128-bit keys. The driver passes crypto manager self-tests, including the extra tests (CRYPTO_MANAGER_EXTRA_TESTS=y). Signed-off-by: Mike Healy <mikex.healy@intel.com> Co-developed-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> Acked-by: Mark Gross <mgross@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
55 lines
2.4 KiB
Makefile
55 lines
2.4 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_CRYPTO_DEV_ALLWINNER) += allwinner/
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obj-$(CONFIG_CRYPTO_DEV_ATMEL_AES) += atmel-aes.o
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obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA) += atmel-sha.o
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obj-$(CONFIG_CRYPTO_DEV_ATMEL_TDES) += atmel-tdes.o
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obj-$(CONFIG_CRYPTO_DEV_ATMEL_I2C) += atmel-i2c.o
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obj-$(CONFIG_CRYPTO_DEV_ATMEL_ECC) += atmel-ecc.o
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obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA204A) += atmel-sha204a.o
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obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += cavium/
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obj-$(CONFIG_CRYPTO_DEV_CCP) += ccp/
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obj-$(CONFIG_CRYPTO_DEV_CCREE) += ccree/
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obj-$(CONFIG_CRYPTO_DEV_CHELSIO) += chelsio/
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obj-$(CONFIG_CRYPTO_DEV_CPT) += cavium/cpt/
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obj-$(CONFIG_CRYPTO_DEV_NITROX) += cavium/nitrox/
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obj-$(CONFIG_CRYPTO_DEV_EXYNOS_RNG) += exynos-rng.o
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obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON) += caam/
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obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o
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obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
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obj-$(CONFIG_CRYPTO_DEV_IMGTEC_HASH) += img-hash.o
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obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
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obj-$(CONFIG_CRYPTO_DEV_MARVELL) += marvell/
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obj-$(CONFIG_CRYPTO_DEV_MEDIATEK) += mediatek/
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obj-$(CONFIG_CRYPTO_DEV_MXS_DCP) += mxs-dcp.o
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obj-$(CONFIG_CRYPTO_DEV_NIAGARA2) += n2_crypto.o
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n2_crypto-y := n2_core.o n2_asm.o
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obj-$(CONFIG_CRYPTO_DEV_NX) += nx/
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obj-$(CONFIG_CRYPTO_DEV_OMAP) += omap-crypto.o
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obj-$(CONFIG_CRYPTO_DEV_OMAP_AES) += omap-aes-driver.o
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omap-aes-driver-objs := omap-aes.o omap-aes-gcm.o
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obj-$(CONFIG_CRYPTO_DEV_OMAP_DES) += omap-des.o
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obj-$(CONFIG_CRYPTO_DEV_OMAP_SHAM) += omap-sham.o
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obj-$(CONFIG_CRYPTO_DEV_PADLOCK_AES) += padlock-aes.o
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obj-$(CONFIG_CRYPTO_DEV_PADLOCK_SHA) += padlock-sha.o
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obj-$(CONFIG_CRYPTO_DEV_PICOXCELL) += picoxcell_crypto.o
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obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/
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obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
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obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
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obj-$(CONFIG_CRYPTO_DEV_QCOM_RNG) += qcom-rng.o
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obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
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obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o
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obj-$(CONFIG_CRYPTO_DEV_SA2UL) += sa2ul.o
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obj-$(CONFIG_CRYPTO_DEV_SAHARA) += sahara.o
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obj-$(CONFIG_ARCH_STM32) += stm32/
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obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
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obj-$(CONFIG_CRYPTO_DEV_UX500) += ux500/
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obj-$(CONFIG_CRYPTO_DEV_VIRTIO) += virtio/
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obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
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obj-$(CONFIG_CRYPTO_DEV_BCM_SPU) += bcm/
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obj-$(CONFIG_CRYPTO_DEV_SAFEXCEL) += inside-secure/
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obj-$(CONFIG_CRYPTO_DEV_ARTPEC6) += axis/
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obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_AES) += xilinx/
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obj-y += hisilicon/
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obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/
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obj-y += keembay/
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