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To do remote FENCEs (i.e. remote TLB flushes) using IPI calls on the RISC-V kernel, we need hardware mechanism to directly inject IPI from the supervisor mode (i.e. RISC-V kernel) instead of using SBI calls. The upcoming AIA IMSIC devices allow direct IPI injection from the supervisor mode (i.e. RISC-V kernel). To support this, we extend the riscv_ipi_set_virq_range() function so that IPI provider (i.e. irqchip drivers can mark IPIs as suitable for remote FENCEs. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230328035223.1480939-5-apatel@ventanamicro.com
78 lines
1.7 KiB
C
78 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Multiplex several IPIs over a single HW IPI.
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*
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* Copyright (c) 2022 Ventana Micro Systems Inc.
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*/
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#define pr_fmt(fmt) "riscv: " fmt
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <asm/sbi.h>
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static int sbi_ipi_virq;
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static void sbi_ipi_handle(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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chained_irq_enter(chip, desc);
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csr_clear(CSR_IP, IE_SIE);
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ipi_mux_process();
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chained_irq_exit(chip, desc);
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}
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static int sbi_ipi_starting_cpu(unsigned int cpu)
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{
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enable_percpu_irq(sbi_ipi_virq, irq_get_trigger_type(sbi_ipi_virq));
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return 0;
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}
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void __init sbi_ipi_init(void)
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{
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int virq;
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struct irq_domain *domain;
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if (riscv_ipi_have_virq_range())
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return;
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domain = irq_find_matching_fwnode(riscv_get_intc_hwnode(),
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DOMAIN_BUS_ANY);
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if (!domain) {
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pr_err("unable to find INTC IRQ domain\n");
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return;
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}
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sbi_ipi_virq = irq_create_mapping(domain, RV_IRQ_SOFT);
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if (!sbi_ipi_virq) {
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pr_err("unable to create INTC IRQ mapping\n");
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return;
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}
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virq = ipi_mux_create(BITS_PER_BYTE, sbi_send_ipi);
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if (virq <= 0) {
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pr_err("unable to create muxed IPIs\n");
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irq_dispose_mapping(sbi_ipi_virq);
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return;
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}
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irq_set_chained_handler(sbi_ipi_virq, sbi_ipi_handle);
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/*
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* Don't disable IPI when CPU goes offline because
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* the masking/unmasking of virtual IPIs is done
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* via generic IPI-Mux
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*/
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cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
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"irqchip/sbi-ipi:starting",
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sbi_ipi_starting_cpu, NULL);
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riscv_ipi_set_virq_range(virq, BITS_PER_BYTE, false);
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pr_info("providing IPIs using SBI IPI extension\n");
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}
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