korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-19 10:14:23 +08:00
Code Issues Packages Projects Releases Wiki Activity
e8c7ef7d58
linux/arch/riscv/kernel
History
Linus Torvalds 435faf5c21 RISC-V Patches for the 5.8 Merge Window, Part 1 
* The remainder of the code necessary to support the Kendryte K210.
     * Support for building device trees into the kernel, as the K210 doesn't
       have a bootloader that provides one.
     * A K210 device tree and the associated defconfig update.
     * Support for skipping PMP initialization on systems that trap on PMP
       accesses rather than treating them as WARL.
 * Support for KGDB.
 * Improvements to text patching.
 * Some cleanups to the SiFive L2 cache driver.
 
 I may have a second part, but I wanted to get this out earlier rather than
 later as they've been ready to go for a while now.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAl7YRtMTHHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRAuExnzX7sYif+oD/4kaoQqmiw0VvyFjBlPT/TC7OPbaoXO
 5WBegSEAl+oOq+fUtjHomzn6HaTW2cPNexsqC/KuGP1/QL0OQ23T5O18LaCmrGMd
 CvELeAcvu6G4kbRuHwF0U16hBI2A1xIYVUJ8qmbuHPpEwVel3AsP2RIjQ+bOvm7g
 fVTIrlzl1s1eTsOXdOJb3sFZtISHb7o3lHZmcplDva3N13x8E0FrjuoJhHv0f2mj
 kcmZcy3sr8luAkwAJmbqmdPuwYTlteMnucXdCUv/kG2SaPkBwU5TS+MN7No2ylXH
 v4vxjkuSyJ1db72pla6uUB/cYD+mh2YI4tjjvH93s3k4I/GZMCrqivXZW2QtxBdt
 na++GxK8e4FrBG+VCCCQvx2mqugpMFMDnZDt36N2BqwjOtEzO3W8GqjrKCovXtQf
 farlgAiuFNVcoo7VFdpNZE+N5elQa0GWf57csCqqMNN4J8JLaOgyS7ByozJ9b9/A
 1x4g7kQANnMvYiYAeV+C2YfBcK6x8gHEPlWio1QZqirW5la34VUEWa18+rQeSRMz
 DArKPauCR1GuYZZVUkkDI8cXj0Gs5fTXsYmn+WsIpjFHnDYeYVe6Ocmczxyb3o3O
 lQwm7+drHlSmMvgrOlWJMrIUbdiomgelDU/iD4PiZzKozC52yKDS6A5gzoG6uZSM
 UleeAIeVG/TDCw==
 =keTq
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - The remainder of the code necessary to support the Kendryte K210:

     * Support for building device trees into the kernel, as the K210
       doesn't have a bootloader that provides one

     * A K210 device tree and the associated defconfig update

     * Support for skipping PMP initialization on systems that trap on
       PMP accesses rather than treating them as WARL

 - Support for KGDB

 - Improvements to text patching

 - Some cleanups to the SiFive L2 cache driver

* tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  soc: sifive: l2 cache: Mark l2_get_priv_group as static
  soc: sifive: l2 cache: Eliminate an unsigned zero compare warning
  riscv: Add support to determine no. of L2 cache way enabled
  riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure
  riscv: Use text_mutex instead of patch_lock
  riscv: Use NOKPROBE_SYMBOL() instead of __krpobes annotation
  riscv: Remove the 'riscv_' prefix of function name
  riscv: Add SW single-step support for KDB
  riscv: Use the XML target descriptions to report 3 system registers
  riscv: Add KGDB support
  kgdb: Add kgdb_has_hit_break function
  RISC-V: Skip setting up PMPs on traps
  riscv: K210: Update defconfig
  riscv: K210: Add a built-in device tree
  riscv: Allow device trees to be built into the kernel
2020-06-04 20:14:18 -07:00
..
vdso riscv: add Linux note to vdso 2020-05-04 14:22:34 -07:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
asm-offsets.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
cacheinfo.c riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure 2020-05-20 15:05:05 -07:00
clint.c riscv: provide native clint access for M-mode 2019-11-17 15:17:39 -08:00
cpu_ops_sbi.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c RISC-V: Add cpu_ops and modify default booting method 2020-03-31 11:25:56 -07:00
cpu_ops.c riscv: force __cpu_up_ variables to put in data section 2020-05-04 15:03:25 -07:00
cpu-hotplug.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu.c RISC-V: Remove unsupported isa string info print 2019-10-28 11:13:59 -07:00
cpufeature.c RISC-V: Add bitmap reprensenting ISA features common across CPUs 2020-05-04 14:08:59 -07:00
entry.S RISC-V Patches for the 5.7 Merge Window, Part 1 2020-04-09 10:51:30 -07:00
fpu.S riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
ftrace.c riscv: Use text_mutex instead of patch_lock 2020-05-18 11:38:16 -07:00
head.h riscv: add prototypes for assembly language functions from head.S 2019-10-28 00:46:00 -07:00
head.S RISC-V: Skip setting up PMPs on traps 2020-05-18 11:38:08 -07:00
irq.c riscv: prefix IRQ_ macro names with an RV_ namespace 2020-01-04 21:48:59 -08:00
kgdb.c riscv: Add SW single-step support for KDB 2020-05-18 11:38:12 -07:00
Makefile riscv: Add KGDB support 2020-05-18 11:38:10 -07:00
mcount-dyn.S riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support 2018-04-02 19:59:13 -07:00
mcount.S RISC-V: remove the unused return_to_handler export 2018-10-22 17:38:12 -07:00
module-sections.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
module.c riscv: avoid the PIC offset of static percpu data in module beyond 2G limits 2020-03-03 10:27:45 -08:00
module.lds RISC-V: Add section of GOT.PLT for kernel module 2018-04-02 20:00:54 -07:00
patch.c riscv: Use text_mutex instead of patch_lock 2020-05-18 11:38:16 -07:00
perf_callchain.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
perf_event.c riscv: perf_event: Make some funciton static 2020-05-11 13:48:19 -07:00
perf_regs.c riscv: Add support for perf registers sampling 2019-09-05 00:48:58 -07:00
process.c RISC-V: gp_in_global needs register keyword 2020-05-21 13:28:26 -07:00
ptrace.c riscv: fix seccomp reject syscall code path 2020-03-05 13:58:15 -08:00
reset.c riscv: cleanup the default power off implementation 2019-11-13 13:22:52 -08:00
riscv_ksyms.c riscv: Add KASAN support 2020-01-22 13:09:58 -08:00
sbi.c riscv: sbi: Fix undefined reference to sbi_shutdown 2020-04-21 16:15:09 -07:00
setup.c riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00
signal.c riscv: add nommu support 2019-11-17 15:17:39 -08:00
smp.c RISC-V: Export riscv_cpuid_to_hartid_mask() API 2020-05-04 14:08:58 -07:00
smpboot.c RISC-V: Add supported for ordered booting method using HSM 2020-03-31 11:27:50 -07:00
soc.c riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00
stacktrace.c riscv: stacktrace: Fix undefined reference to `walk_stackframe' 2020-05-12 17:04:25 -07:00
sys_riscv.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
syscall_table.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
time.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
traps_misaligned.c riscv: Unaligned load/store handling for M_MODE 2020-04-03 10:45:33 -07:00
traps.c riscv: Add KGDB support 2020-05-18 11:38:10 -07:00
vdso.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
vmlinux.lds.S riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00