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ea6f23f593
This adds the TVE200/TVC TV-encoder and the Ilitek ILI9322 panel to the DIR-685 device tree. This brings graphics to this funky router and it is possible to even run a console on its tiny screen. Incidentally this requires us to disable the access to the parallel (NOR) flash, as the communication pins to the panel are shared with the flash memory. To access the flash, a separate kernel with the panel disabled and the flash enabled should be booted. The pin control selecting whether to use the lines cannot be altered at runtime due to hardware constraints. Cc: David Lechner <david@lechnology.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
308 lines
7.3 KiB
Plaintext
308 lines
7.3 KiB
Plaintext
/*
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* Device Tree file for D-Link DIR-685 Xtreme N Storage Router
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*/
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/dts-v1/;
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#include "gemini.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "D-Link DIR-685 Xtreme N Storage Router";
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compatible = "dlink,dir-685", "cortina,gemini";
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#address-cells = <1>;
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#size-cells = <1>;
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memory {
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/* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
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device_type = "memory";
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reg = <0x00000000 0x8000000>;
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};
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chosen {
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stdout-path = "uart0:115200n8";
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button-esc {
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debounce_interval = <50>;
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wakeup-source;
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linux,code = <KEY_ESC>;
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label = "reset";
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/* Collides with LPC_LAD[0], UART DCD, SSP 97RST */
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gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
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};
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button-eject {
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debounce_interval = <50>;
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wakeup-source;
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linux,code = <KEY_EJECTCD>;
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label = "unmount";
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/* Collides with LPC LFRAME, UART RTS, SSP TXD */
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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};
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};
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vdisp: regulator {
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compatible = "regulator-fixed";
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regulator-name = "display-power";
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regulator-min-microvolt = <3600000>;
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regulator-max-microvolt = <3600000>;
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/* Collides with LCD E */
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gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Collides with IDE pins, that's cool (we do not use them) */
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gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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/* Collides with pflash CE1, not so cool */
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cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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num-chipselects = <1>;
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panel: display@0 {
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compatible = "dlink,dir-685-panel", "ilitek,ili9322";
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reg = <0>;
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/* 50 ns min period = 20 MHz */
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spi-max-frequency = <20000000>;
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spi-cpol; /* Clock active low */
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vcc-supply = <&vdisp>;
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iovcc-supply = <&vdisp>;
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vci-supply = <&vdisp>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&display_out>;
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};
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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led-wps {
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label = "dir685:blue:WPS";
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/* Collides with ICE */
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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/*
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* These two LEDs are on the side of the device.
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* For electrical reasons, both LEDs cannot be active
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* at the same time so only blue or orange can on at
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* one time. Enabling both makes the LED go dark.
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* The LEDs both sit inside the unmount button and the
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* label on the case says "unmount".
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*/
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led-blue-hd {
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label = "dir685:blue:HD";
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/* Collides with LPC_SERIRQ, UART DTR, SSP FSC pins */
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gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-orange-hd {
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label = "dir685:orange:HD";
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/* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */
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gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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/*
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* This is a Sunon Maglev GM0502PFV2-8 cooling fan @10000 RPM.
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* Since the platform has no temperature sensor, this is controlled
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* from userspace by using the hard disks S.M.A.R.T. temperature
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* sensor. It is turned on when the temperature exceeds 46 degrees
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* and turned off when the temperatures goes below 41 degrees
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* (celsius).
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*/
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gpio-fan {
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compatible = "gpio-fan";
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/* Collides with IDE */
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gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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gpio-fan,speed-map = <0 0>, <10000 1>;
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#cooling-cells = <2>;
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};
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/*
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* The touchpad input is connected to a GPIO bit-banged
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* I2C bus.
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*/
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gpio-i2c {
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compatible = "i2c-gpio";
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/* Collides with ICE */
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sda-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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#address-cells = <1>;
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#size-cells = <0>;
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touchkeys@26 {
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compatible = "dlink,dir685-touchkeys";
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reg = <0x26>;
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interrupt-parent = <&gpio0>;
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/* Collides with NAND flash */
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interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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soc {
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flash@30000000 {
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/*
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* Flash access is by default disabled, because it
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* collides with the Chip Enable signal for the display
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* panel, that reuse the parallel flash Chip Select 1
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* (CS1). Enabling flash makes graphics stop working.
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*
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* We might be able to hack around this by letting
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* GPIO poke around in the flash controller registers.
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*/
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/* status = "okay"; */
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/* 32MB of flash */
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reg = <0x30000000 0x02000000>;
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/*
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* This "RedBoot" is the Storlink derivative.
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*/
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partition@0 {
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label = "RedBoot";
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reg = <0x00000000 0x00040000>;
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read-only;
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};
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/*
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* Between the boot loader and the rootfs is the kernel
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* in a custom Storlink format flashed from the boot
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* menu. The rootfs is in squashfs format.
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*/
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partition@1800c0 {
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label = "rootfs";
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reg = <0x001800c0 0x01dbff40>;
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read-only;
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};
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partition@1f40000 {
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label = "upgrade";
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reg = <0x01f40000 0x00040000>;
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read-only;
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};
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partition@1f80000 {
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label = "rgdb";
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reg = <0x01f80000 0x00040000>;
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read-only;
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};
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/*
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* This partition contains MAC addresses for WAN,
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* WLAN and LAN, and the country code (for wireless
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* I guess).
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*/
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partition@1fc0000 {
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label = "nvram";
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reg = <0x01fc0000 0x00020000>;
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read-only;
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};
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partition@1fe0000 {
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label = "LangPack";
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reg = <0x01fe0000 0x00020000>;
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read-only;
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};
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};
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syscon: syscon@40000000 {
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pinctrl {
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/*
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* gpio0bgrp cover line 5, 6 used by TK I2C
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* gpio0bgrp cover line 7 used by WPS LED
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* gpio0cgrp cover line 8, 13 used by keys
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* and 11, 12 used by the HD LEDs
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* gpio0egrp cover line 16 used by VDISP
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* gpio0fgrp cover line 17 used by TK IRQ
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* gpio0ggrp cover line 20 used by panel CS
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* gpio0hgrp cover line 21,22 used by RTL8366RB
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*/
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gpio0_default_pins: pinctrl-gpio0 {
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mux {
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function = "gpio0";
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groups = "gpio0bgrp",
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"gpio0cgrp",
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"gpio0egrp",
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"gpio0fgrp",
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"gpio0ggrp",
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"gpio0hgrp";
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};
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};
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/*
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* gpio1bgrp cover line 5,8,7 used by panel SPI
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* also line 6 used by the fan
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*
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*/
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gpio1_default_pins: pinctrl-gpio1 {
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mux {
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function = "gpio1";
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groups = "gpio1bgrp";
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};
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};
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};
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};
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sata: sata@46000000 {
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cortina,gemini-ata-muxmode = <0>;
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cortina,gemini-enable-sata-bridge;
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status = "okay";
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};
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gpio0: gpio@4d000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio0_default_pins>;
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};
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gpio1: gpio@4e000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_default_pins>;
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};
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pci@50000000 {
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status = "okay";
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map =
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<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
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<0x4800 0 0 2 &pci_intc 1>,
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<0x4800 0 0 3 &pci_intc 2>,
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<0x4800 0 0 4 &pci_intc 3>,
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<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
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<0x5000 0 0 2 &pci_intc 2>,
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<0x5000 0 0 3 &pci_intc 3>,
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<0x5000 0 0 4 &pci_intc 0>,
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<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
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<0x5800 0 0 2 &pci_intc 3>,
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<0x5800 0 0 3 &pci_intc 0>,
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<0x5800 0 0 4 &pci_intc 1>,
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<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
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<0x6000 0 0 2 &pci_intc 0>,
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<0x6000 0 0 3 &pci_intc 1>,
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<0x6000 0 0 4 &pci_intc 2>;
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};
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ata@63000000 {
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status = "okay";
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};
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display-controller@6a000000 {
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status = "okay";
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port@0 {
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reg = <0>;
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display_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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};
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