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d486a5b499
This patch adds support the the BCM5354 SoC. It has a PMU and a constant not configurable clock. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
215 lines
5.8 KiB
C
215 lines
5.8 KiB
C
#ifndef LINUX_SSB_PRIVATE_H_
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#define LINUX_SSB_PRIVATE_H_
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#include <linux/ssb/ssb.h>
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#include <linux/types.h>
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#define PFX "ssb: "
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#ifdef CONFIG_SSB_SILENT
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# define ssb_printk(fmt, x...) do { /* nothing */ } while (0)
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#else
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# define ssb_printk printk
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#endif /* CONFIG_SSB_SILENT */
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/* dprintk: Debugging printk; vanishes for non-debug compilation */
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#ifdef CONFIG_SSB_DEBUG
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# define ssb_dprintk(fmt, x...) ssb_printk(fmt , ##x)
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#else
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# define ssb_dprintk(fmt, x...) do { /* nothing */ } while (0)
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#endif
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#ifdef CONFIG_SSB_DEBUG
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# define SSB_WARN_ON(x) WARN_ON(x)
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# define SSB_BUG_ON(x) BUG_ON(x)
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#else
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static inline int __ssb_do_nothing(int x) { return x; }
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# define SSB_WARN_ON(x) __ssb_do_nothing(unlikely(!!(x)))
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# define SSB_BUG_ON(x) __ssb_do_nothing(unlikely(!!(x)))
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#endif
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/* pci.c */
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#ifdef CONFIG_SSB_PCIHOST
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extern int ssb_pci_switch_core(struct ssb_bus *bus,
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struct ssb_device *dev);
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extern int ssb_pci_switch_coreidx(struct ssb_bus *bus,
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u8 coreidx);
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extern int ssb_pci_xtal(struct ssb_bus *bus, u32 what,
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int turn_on);
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extern int ssb_pci_get_invariants(struct ssb_bus *bus,
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struct ssb_init_invariants *iv);
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extern void ssb_pci_exit(struct ssb_bus *bus);
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extern int ssb_pci_init(struct ssb_bus *bus);
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extern const struct ssb_bus_ops ssb_pci_ops;
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#else /* CONFIG_SSB_PCIHOST */
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static inline int ssb_pci_switch_core(struct ssb_bus *bus,
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struct ssb_device *dev)
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{
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return 0;
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}
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static inline int ssb_pci_switch_coreidx(struct ssb_bus *bus,
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u8 coreidx)
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{
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return 0;
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}
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static inline int ssb_pci_xtal(struct ssb_bus *bus, u32 what,
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int turn_on)
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{
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return 0;
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}
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static inline void ssb_pci_exit(struct ssb_bus *bus)
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{
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}
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static inline int ssb_pci_init(struct ssb_bus *bus)
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{
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return 0;
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}
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#endif /* CONFIG_SSB_PCIHOST */
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/* pcmcia.c */
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#ifdef CONFIG_SSB_PCMCIAHOST
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extern int ssb_pcmcia_switch_core(struct ssb_bus *bus,
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struct ssb_device *dev);
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extern int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus,
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u8 coreidx);
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extern int ssb_pcmcia_switch_segment(struct ssb_bus *bus,
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u8 seg);
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extern int ssb_pcmcia_get_invariants(struct ssb_bus *bus,
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struct ssb_init_invariants *iv);
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extern int ssb_pcmcia_hardware_setup(struct ssb_bus *bus);
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extern void ssb_pcmcia_exit(struct ssb_bus *bus);
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extern int ssb_pcmcia_init(struct ssb_bus *bus);
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extern const struct ssb_bus_ops ssb_pcmcia_ops;
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#else /* CONFIG_SSB_PCMCIAHOST */
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static inline int ssb_pcmcia_switch_core(struct ssb_bus *bus,
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struct ssb_device *dev)
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{
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return 0;
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}
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static inline int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus,
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u8 coreidx)
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{
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return 0;
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}
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static inline int ssb_pcmcia_switch_segment(struct ssb_bus *bus,
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u8 seg)
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{
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return 0;
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}
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static inline int ssb_pcmcia_hardware_setup(struct ssb_bus *bus)
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{
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return 0;
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}
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static inline void ssb_pcmcia_exit(struct ssb_bus *bus)
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{
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}
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static inline int ssb_pcmcia_init(struct ssb_bus *bus)
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{
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return 0;
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}
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#endif /* CONFIG_SSB_PCMCIAHOST */
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/* sdio.c */
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#ifdef CONFIG_SSB_SDIOHOST
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extern int ssb_sdio_get_invariants(struct ssb_bus *bus,
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struct ssb_init_invariants *iv);
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extern u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset);
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extern int ssb_sdio_switch_core(struct ssb_bus *bus, struct ssb_device *dev);
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extern int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx);
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extern int ssb_sdio_hardware_setup(struct ssb_bus *bus);
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extern void ssb_sdio_exit(struct ssb_bus *bus);
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extern int ssb_sdio_init(struct ssb_bus *bus);
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extern const struct ssb_bus_ops ssb_sdio_ops;
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#else /* CONFIG_SSB_SDIOHOST */
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static inline u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset)
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{
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return 0;
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}
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static inline int ssb_sdio_switch_core(struct ssb_bus *bus,
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struct ssb_device *dev)
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{
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return 0;
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}
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static inline int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx)
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{
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return 0;
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}
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static inline int ssb_sdio_hardware_setup(struct ssb_bus *bus)
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{
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return 0;
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}
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static inline void ssb_sdio_exit(struct ssb_bus *bus)
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{
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}
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static inline int ssb_sdio_init(struct ssb_bus *bus)
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{
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return 0;
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}
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#endif /* CONFIG_SSB_SDIOHOST */
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/* scan.c */
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extern const char *ssb_core_name(u16 coreid);
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extern int ssb_bus_scan(struct ssb_bus *bus,
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unsigned long baseaddr);
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extern void ssb_iounmap(struct ssb_bus *ssb);
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/* sprom.c */
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extern
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ssize_t ssb_attr_sprom_show(struct ssb_bus *bus, char *buf,
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int (*sprom_read)(struct ssb_bus *bus, u16 *sprom));
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extern
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ssize_t ssb_attr_sprom_store(struct ssb_bus *bus,
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const char *buf, size_t count,
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int (*sprom_check_crc)(const u16 *sprom, size_t size),
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int (*sprom_write)(struct ssb_bus *bus, const u16 *sprom));
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extern int ssb_fill_sprom_with_fallback(struct ssb_bus *bus,
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struct ssb_sprom *out);
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/* core.c */
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extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m);
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extern struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev);
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int ssb_for_each_bus_call(unsigned long data,
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int (*func)(struct ssb_bus *bus, unsigned long data));
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extern struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev);
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struct ssb_freeze_context {
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/* Pointer to the bus */
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struct ssb_bus *bus;
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/* Boolean list to indicate whether a device is frozen on this bus. */
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bool device_frozen[SSB_MAX_NR_CORES];
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};
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extern int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx);
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extern int ssb_devices_thaw(struct ssb_freeze_context *ctx);
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/* b43_pci_bridge.c */
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#ifdef CONFIG_SSB_B43_PCI_BRIDGE
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extern int __init b43_pci_ssb_bridge_init(void);
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extern void __exit b43_pci_ssb_bridge_exit(void);
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#else /* CONFIG_SSB_B43_PCI_BRIDGE */
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static inline int b43_pci_ssb_bridge_init(void)
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{
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return 0;
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}
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static inline void b43_pci_ssb_bridge_exit(void)
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{
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}
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#endif /* CONFIG_SSB_B43_PCI_BRIDGE */
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/* driver_chipcommon_pmu.c */
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extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc);
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extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc);
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#endif /* LINUX_SSB_PRIVATE_H_ */
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