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f5087f68e7
Allocate MSI entries for both first and second range if they are valid Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
159 lines
3.9 KiB
C
159 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Texas Instruments' K3 Interrupt Aggregator MSI bus
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*
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* Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*/
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/msi.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/soc/ti/ti_sci_inta_msi.h>
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#include <linux/soc/ti/ti_sci_protocol.h>
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static void ti_sci_inta_msi_write_msg(struct irq_data *data,
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struct msi_msg *msg)
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{
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/* Nothing to do */
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}
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static void ti_sci_inta_msi_compose_msi_msg(struct irq_data *data,
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struct msi_msg *msg)
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{
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/* Nothing to do */
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}
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static void ti_sci_inta_msi_update_chip_ops(struct msi_domain_info *info)
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{
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struct irq_chip *chip = info->chip;
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if (WARN_ON(!chip))
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return;
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chip->irq_request_resources = irq_chip_request_resources_parent;
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chip->irq_release_resources = irq_chip_release_resources_parent;
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chip->irq_compose_msi_msg = ti_sci_inta_msi_compose_msi_msg;
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chip->irq_write_msi_msg = ti_sci_inta_msi_write_msg;
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chip->irq_set_type = irq_chip_set_type_parent;
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chip->irq_unmask = irq_chip_unmask_parent;
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chip->irq_mask = irq_chip_mask_parent;
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chip->irq_ack = irq_chip_ack_parent;
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}
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struct irq_domain *ti_sci_inta_msi_create_irq_domain(struct fwnode_handle *fwnode,
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struct msi_domain_info *info,
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struct irq_domain *parent)
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{
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struct irq_domain *domain;
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ti_sci_inta_msi_update_chip_ops(info);
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domain = msi_create_irq_domain(fwnode, info, parent);
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if (domain)
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irq_domain_update_bus_token(domain, DOMAIN_BUS_TI_SCI_INTA_MSI);
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return domain;
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}
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EXPORT_SYMBOL_GPL(ti_sci_inta_msi_create_irq_domain);
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static void ti_sci_inta_msi_free_descs(struct device *dev)
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{
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struct msi_desc *desc, *tmp;
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list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) {
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list_del(&desc->list);
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free_msi_entry(desc);
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}
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}
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static int ti_sci_inta_msi_alloc_descs(struct device *dev,
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struct ti_sci_resource *res)
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{
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struct msi_desc *msi_desc;
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int set, i, count = 0;
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for (set = 0; set < res->sets; set++) {
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for (i = 0; i < res->desc[set].num; i++) {
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msi_desc = alloc_msi_entry(dev, 1, NULL);
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if (!msi_desc) {
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ti_sci_inta_msi_free_descs(dev);
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return -ENOMEM;
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}
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msi_desc->inta.dev_index = res->desc[set].start + i;
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INIT_LIST_HEAD(&msi_desc->list);
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list_add_tail(&msi_desc->list, dev_to_msi_list(dev));
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count++;
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}
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for (i = 0; i < res->desc[set].num_sec; i++) {
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msi_desc = alloc_msi_entry(dev, 1, NULL);
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if (!msi_desc) {
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ti_sci_inta_msi_free_descs(dev);
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return -ENOMEM;
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}
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msi_desc->inta.dev_index = res->desc[set].start_sec + i;
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INIT_LIST_HEAD(&msi_desc->list);
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list_add_tail(&msi_desc->list, dev_to_msi_list(dev));
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count++;
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}
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}
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return count;
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}
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int ti_sci_inta_msi_domain_alloc_irqs(struct device *dev,
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struct ti_sci_resource *res)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct irq_domain *msi_domain;
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int ret, nvec;
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msi_domain = dev_get_msi_domain(dev);
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if (!msi_domain)
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return -EINVAL;
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if (pdev->id < 0)
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return -ENODEV;
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nvec = ti_sci_inta_msi_alloc_descs(dev, res);
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if (nvec <= 0)
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return nvec;
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ret = msi_domain_alloc_irqs(msi_domain, dev, nvec);
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if (ret) {
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dev_err(dev, "Failed to allocate IRQs %d\n", ret);
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goto cleanup;
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}
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return 0;
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cleanup:
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ti_sci_inta_msi_free_descs(&pdev->dev);
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return ret;
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}
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EXPORT_SYMBOL_GPL(ti_sci_inta_msi_domain_alloc_irqs);
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void ti_sci_inta_msi_domain_free_irqs(struct device *dev)
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{
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msi_domain_free_irqs(dev->msi_domain, dev);
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ti_sci_inta_msi_free_descs(dev);
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}
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EXPORT_SYMBOL_GPL(ti_sci_inta_msi_domain_free_irqs);
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unsigned int ti_sci_inta_msi_get_virq(struct device *dev, u32 dev_index)
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{
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struct msi_desc *desc;
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for_each_msi_entry(desc, dev)
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if (desc->inta.dev_index == dev_index)
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return desc->irq;
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return -ENODEV;
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}
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EXPORT_SYMBOL_GPL(ti_sci_inta_msi_get_virq);
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