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3a3ff88a0f
Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver enables core_mmss_clk. We're seeing some branch clock warnings on 8x96 when enabling this. There doesn't seem to be any negative effect with not enabling this clock, so use it once we figure out why we get the warnings. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
152 lines
4.2 KiB
C
152 lines
4.2 KiB
C
/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "dsi_cfg.h"
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static const char * const dsi_v2_bus_clk_names[] = {
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"core_mmss_clk", "iface_clk", "bus_clk",
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};
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static const struct msm_dsi_config apq8064_dsi_cfg = {
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.io_offset = 0,
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.reg_cfg = {
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.num = 3,
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.regs = {
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{"vdda", 100000, 100}, /* 1.2 V */
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{"avdd", 10000, 100}, /* 3.0 V */
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{"vddio", 100000, 100}, /* 1.8 V */
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},
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},
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.bus_clk_names = dsi_v2_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
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.io_start = { 0x4700000, 0x5800000 },
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.num_dsi = 2,
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};
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static const char * const dsi_6g_bus_clk_names[] = {
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"mdp_core_clk", "iface_clk", "bus_clk", "core_mmss_clk",
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};
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static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1},
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{"vdd", 150000, 100}, /* 3.0 V */
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{"vdda", 100000, 100}, /* 1.2 V */
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{"vddio", 100000, 100}, /* 1.8 V */
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},
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},
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.bus_clk_names = dsi_6g_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
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.io_start = { 0xfd922800, 0xfd922b00 },
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.num_dsi = 2,
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};
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static const char * const dsi_8916_bus_clk_names[] = {
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"mdp_core_clk", "iface_clk", "bus_clk",
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};
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static const struct msm_dsi_config msm8916_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 3,
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.regs = {
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{"gdsc", -1, -1},
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{"vdda", 100000, 100}, /* 1.2 V */
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{"vddio", 100000, 100}, /* 1.8 V */
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},
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},
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.bus_clk_names = dsi_8916_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
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.io_start = { 0x1a98000 },
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.num_dsi = 1,
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};
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static const struct msm_dsi_config msm8994_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 7,
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.regs = {
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{"gdsc", -1, -1},
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{"vdda", 100000, 100}, /* 1.25 V */
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{"vddio", 100000, 100}, /* 1.8 V */
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{"vcca", 10000, 100}, /* 1.0 V */
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{"vdd", 100000, 100}, /* 1.8 V */
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{"lab_reg", -1, -1},
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{"ibb_reg", -1, -1},
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},
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},
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.bus_clk_names = dsi_6g_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
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.io_start = { 0xfd998000, 0xfd9a0000 },
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.num_dsi = 2,
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};
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/*
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* TODO: core_mmss_clk fails to enable for some reason, but things work fine
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* without it too. Figure out why it doesn't enable and uncomment below
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*/
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static const char * const dsi_8996_bus_clk_names[] = {
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"mdp_core_clk", "iface_clk", "bus_clk", /* "core_mmss_clk", */
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};
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static const struct msm_dsi_config msm8996_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 2,
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.regs = {
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{"vdda", 18160, 1 }, /* 1.25 V */
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{"vcca", 17000, 32 }, /* 0.925 V */
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{"vddio", 100000, 100 },/* 1.8 V */
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},
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},
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.bus_clk_names = dsi_8996_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
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.io_start = { 0x994000, 0x996000 },
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.num_dsi = 2,
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};
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static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
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{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, &msm8996_dsi_cfg},
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};
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const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
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{
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const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
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int i;
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for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
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if ((dsi_cfg_handlers[i].major == major) &&
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(dsi_cfg_handlers[i].minor == minor)) {
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cfg_hnd = &dsi_cfg_handlers[i];
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break;
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}
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}
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return cfg_hnd;
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}
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